Chikuma; Takamasa
Patent Applications and Registrations
Patent applications and USPTO patent grants for Chikuma; Takamasa.The latest application filed is for "substrate processing system and substrate position correction method".
- Chikuma; Takamasa - Nirasaki JP
- Chikuma; Takamasa - Nirasaki City JP
- Chikuma; Takamasa - Yamanashi JP
- Chikuma, Takamasa - Nirasaki-shi JP
| Patent | Date |
|---|---|
| Substrate processing system and substrate position correction method Grant 9,318,363 - Kai , et al. April 19, 2 | 2016-04-19 |
| Semiconductor manufacturing system Grant 9,223,305 - Ikeda , et al. December 29, 2 | 2015-12-29 |
| Substrate Processing System And Substrate Position Correction Method App 20150005928 - Kai; Kozo ; et al. | 2015-01-01 |
| Semiconductor Manufacturing System App 20130013240 - Ikeda; Gaku ; et al. | 2013-01-10 |
| Method and device for processing semiconductor wafer Grant 6,999,830 - Arai , et al. February 14, 2 | 2006-02-14 |
| Method and device for processing semicounductor wafer App 20050015174 - Arai, Shinji ; et al. | 2005-01-20 |
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