loadpatents
name:-0.059478998184204
name:-0.054019927978516
name:-0.014554023742676
Chiang; Tsung-Yu Patent Filings

Chiang; Tsung-Yu

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chiang; Tsung-Yu.The latest application filed is for "barrier layer for contact structures of semiconductor devices".

Company Profile
13.44.51
  • Chiang; Tsung-Yu - New Taipei City TW
  • Chiang; Tsung-Yu - New Taipei TW
  • Chiang; Tsung-Yu - Taipei TW
  • CHIANG; Tsung-Yu - Taipei City TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Barrier Layer For Contact Structures Of Semiconductor Devices
App 20220130678 - Tseng; Hsinhsiang ;   et al.
2022-04-28
Semiconductor Device and Fabricating Method Thereof
App 20210280575 - Huang; Cheng-Chien ;   et al.
2021-09-09
Circuit Devices with Gate Seals
App 20210280687 - Lai; Sheng-Chou ;   et al.
2021-09-09
Semiconductor device and fabricating method thereof
Grant 11,018,131 - Huang , et al. May 25, 2
2021-05-25
Circuit devices with gate seals
Grant 11,011,618 - Lai , et al. May 18, 2
2021-05-18
Methods for manufacturing semiconductor arrangements using photoresist masks
Grant 10,957,653 - Chiang , et al. March 23, 2
2021-03-23
Multi-depth Etching In Semiconductor Arrangement
App 20210066132 - CHIANG; Tsung-Yu ;   et al.
2021-03-04
Gate structures for semiconductor devices
Grant 10,879,127 - Ho , et al. December 29, 2
2020-12-29
Methods for forming a semiconductor arrangement of fins having multiple heights and an alignment mark
Grant 10,840,143 - Chiang , et al. November 17, 2
2020-11-17
Formation Method Of Semiconductor Device Structure With Gate Stacks
App 20200357912 - YANG; Ya-Wen ;   et al.
2020-11-12
Structure And Formation Method Of Semiconductor Device Structure With Gate Structure
App 20200335595 - HUANG; Yi-Ching ;   et al.
2020-10-22
Structure and formation method of semiconductor device structure with gate stacks
Grant 10,734,522 - Yang , et al.
2020-08-04
Structure and formation method of semiconductor device structure with gate structure
Grant 10,707,316 - Huang , et al.
2020-07-07
Gate Structures For Semiconductor Devices
App 20200144127 - HO; Wei-Shuo ;   et al.
2020-05-07
Multi-height Semiconductor Structures
App 20200043859 - CHIANG; Tsung-Yu ;   et al.
2020-02-06
Gate structures with various widths and method for forming the same
Grant 10,522,412 - Ho , et al. Dec
2019-12-31
Back-end-of-line (BEOL) arrangement with multi-height interlayer dielectric (ILD) structures
Grant 10,515,902 - Chiang , et al. Dec
2019-12-24
Method for forming semiconductor device contact
Grant 10,453,741 - Huang , et al. Oc
2019-10-22
Semiconductor device and method of fabricating the same
Grant 10,347,766 - Ho , et al. July 9, 2
2019-07-09
Circuit Devices with Gate Seals
App 20190165125 - Lai; Sheng-Chou ;   et al.
2019-05-30
Multi-depth Etching In Semiconductor Arrangement
App 20190096766 - CHIANG; Tsung-Yu ;   et al.
2019-03-28
Semiconductor arrangement with fins having multiple heights and a dielectric layer recessed in the substrate
Grant 10,177,036 - Chiang , et al. J
2019-01-08
Semiconductor Device and Fabricating Method Thereof
App 20180342503 - Huang; Cheng-Chien ;   et al.
2018-11-29
Mechanisms for forming FinFETs with different fin heights
Grant 10,134,626 - Chiang , et al. November 20, 2
2018-11-20
Metal gate structure and manufacturing method thereof
Grant 10,056,299 - Ho , et al. August 21, 2
2018-08-21
Semiconductor device and fabricating method thereof
Grant 10,050,030 - Huang , et al. August 14, 2
2018-08-14
Gate Structures with Various Widths and Method for Forming the Same
App 20180174916 - HO; Wei-Shuo ;   et al.
2018-06-21
Multi-depth Etching In Semiconductor Arrangement
App 20180174914 - Chiang; Tsung-Yu ;   et al.
2018-06-21
Method For Forming Semiconductor Device Contact
App 20180166329 - HUANG; Cheng-Chien ;   et al.
2018-06-14
Structure And Formation Method Of Semiconductor Device Structure With Gate Structure
App 20180166548 - HUANG; Yi-Ching ;   et al.
2018-06-14
Multi-height Semiconductor Structures
App 20180138129 - CHIANG; Tsung-Yu ;   et al.
2018-05-17
Semiconductor device and fabricating method thereof
Grant 9,947,766 - Chiang , et al. April 17, 2
2018-04-17
Mechanisms For Forming Finfets With Different Fin Heights
App 20180102278 - CHIANG; Tsung-Yu ;   et al.
2018-04-12
Semiconductor device structure with fin structure and method for forming the same
Grant 9,941,386 - Lin , et al. April 10, 2
2018-04-10
Methods for forming a semiconductor arrangement with multiple-height fins and substrate trenches
Grant 9,911,658 - Chiang , et al. March 6, 2
2018-03-06
Gate structures with various widths and method for forming the same
Grant 9,899,265 - Ho , et al. February 20, 2
2018-02-20
Fin field effect transistor (FinFET) device structure with different gate profile and method for forming the same
Grant 9,899,382 - Huang , et al. February 20, 2
2018-02-20
Semiconductor arrangement having an overlay alignment mark with a height shorter than a neighboring gate structure
Grant 9,870,998 - Chiang , et al. January 16, 2
2018-01-16
Structure And Formation Method Of Semiconductor Device Structure With Gate Stacks
App 20170365705 - YANG; Ya-Wen ;   et al.
2017-12-21
Mechanisms for forming FinFETs with different fin heights
Grant 9,842,761 - Chiang , et al. December 12, 2
2017-12-12
Fin Field Effect Transistor (finfet) Device Structure With Different Gate Profile And Method For Forming The Same
App 20170352656 - HUANG; Yi-Ching ;   et al.
2017-12-07
Semiconductor Device Structure With Fin Structure And Method For Forming The Same
App 20170352740 - LIN; Chung-Wei ;   et al.
2017-12-07
Semiconductor Device And Fabricating Method Thereof
App 20170309726 - CHIANG; Tsung-Yu ;   et al.
2017-10-26
Method of manufacturing semiconductor device
Grant 9,768,069 - Ho , et al. September 19, 2
2017-09-19
Integrated circuit structure and method for manufacturing thereof
Grant 9,711,408 - Chiang , et al. July 18, 2
2017-07-18
Modified self-aligned contact process and semiconductor device
Grant 9,711,611 - Chiang , et al. July 18, 2
2017-07-18
Semiconductor device and fabricating method thereof
Grant 9,704,970 - Chiang , et al. July 11, 2
2017-07-11
Mechanisms For Forming Finfets With Different Fin Heights
App 20170140980 - CHIANG; Tsung-Yu ;   et al.
2017-05-18
Metal Gate Structure And Manufacturing Method Thereof
App 20170125301 - HO; WEI-SHUO ;   et al.
2017-05-04
Gate Structures With Various Widths And Method For Forming The Same
App 20170098581 - HO; Wei-Shuo ;   et al.
2017-04-06
Metal gate structure and manufacturing method thereof
Grant 9,614,088 - Ho , et al. April 4, 2
2017-04-04
Multi-depth Etching In Semiconductor Arrangement
App 20170084494 - Chiang; Tsung-Yu ;   et al.
2017-03-23
Semiconductor Device And Fabricating Method Thereof
App 20170069621 - Huang; Cheng-Chien ;   et al.
2017-03-09
Metal gate structure and manufacturing method thereof
Grant 9,583,362 - Ho , et al. February 28, 2
2017-02-28
Metal gate and manufuacturing process thereof
Grant 9,577,067 - Ho , et al. February 21, 2
2017-02-21
Mechanisms for forming FinFETs with different fin heights
Grant 9,559,011 - Chiang , et al. January 31, 2
2017-01-31
Gate structures with various widths and method for forming the same
Grant 9,524,965 - Ho , et al. December 20, 2
2016-12-20
Semiconductor arrangement with multiple-height fins and substrate trenches
Grant 9,515,184 - Chiang , et al. December 6, 2
2016-12-06
Methods and apparatus of metal gate transistors
Grant 9,508,590 - Chiang , et al. November 29, 2
2016-11-29
Semiconductor Device And Fabricating Method Thereof
App 20160276462 - CHIANG; Tsung-Yu ;   et al.
2016-09-22
Fabricating method of semiconductor device
Grant 9,425,285 - Chiang , et al. August 23, 2
2016-08-23
Modified Self-aligned Contact Process And Semiconductor Device
App 20160211344 - CHIANG; Tsung-Yu ;   et al.
2016-07-21
Method Of Manufacturing Semiconductor Device
App 20160197016 - HO; Wei-Shuo ;   et al.
2016-07-07
Methods and Apparatus of Metal Gate Transistors
App 20160133509 - Chiang; Tsung-Yu ;   et al.
2016-05-12
Integrated Circuit Structure And Method For Manufacturing Thereof
App 20160126140 - Chiang; Tsung-Yu ;   et al.
2016-05-05
Modified self-aligned contact process and semiconductor device
Grant 9,324,577 - Chiang , et al. April 26, 2
2016-04-26
Semiconductor device with gate stacks and method of manufacturing the same
Grant 9,306,023 - Ho , et al. April 5, 2
2016-04-05
Fabricating Method Of Semiconductor Device
App 20160087076 - CHIANG; Tsung-Yu ;   et al.
2016-03-24
Semiconductor Device And Method Of Fabricating The Same
App 20160064567 - HO; Wei-Shuo ;   et al.
2016-03-03
Metal Gate Structure And Manufacturing Method Thereof
App 20160056292 - HO; Wei-Shuo ;   et al.
2016-02-25
Metal Gate And Manufuacturing Process Thereof
App 20160056262 - HO; WEI-SHUO ;   et al.
2016-02-25
Integrated circuit structure and method for manufacturing thereof
Grant 9,269,626 - Chiang , et al. February 23, 2
2016-02-23
Multi-height Semiconductor Structures
App 20160043038 - Chiang; Tsung-Yu ;   et al.
2016-02-11
Mechanisms For Forming Finfets With Different Fin Heights
App 20160043003 - CHIANG; Tsung-Yu ;   et al.
2016-02-11
Structures and formation methods of finFET device
Grant 9,257,505 - Lai , et al. February 9, 2
2016-02-09
Methods and apparatus of metal gate transistors
Grant 9,252,259 - Chiang , et al. February 2, 2
2016-02-02
Semiconductor device and fabricating method thereof
Grant 9,231,067 - Chiang , et al. January 5, 2
2016-01-05
Dynamic tag generating apparatus and dynamic tag generating method thereof for use in display apparatus
Grant 9,223,750 - Liu , et al. December 29, 2
2015-12-29
Structures And Formation Methods Of Finfet Device
App 20150325646 - LAI; Ying-Hua ;   et al.
2015-11-12
Mechanisms for forming FinFETs with different fin heights
Grant 9,184,087 - Chiang , et al. November 10, 2
2015-11-10
Methods for forming a semiconductor arrangement with structures having different heights
Grant 9,178,066 - Chiang , et al. November 3, 2
2015-11-03
Apparatus and method for designing an integrated circuit layout having a plurality of cell technologies
Grant 9,122,828 - Chiang , et al. September 1, 2
2015-09-01
Semiconductor Device And Fabricating Method Thereof
App 20150243746 - CHIANG; Tsung-Yu ;   et al.
2015-08-27
Gate Structures With Various Widths And Method For Forming The Same
App 20150228646 - HO; Wei-Shuo ;   et al.
2015-08-13
Modified Self-aligned Contact Process And Semiconductor Device
App 20150228746 - CHIANG; Tsung-Yu ;   et al.
2015-08-13
Integrated Circuit Structure And Method For Manufacturing Thereof
App 20150221555 - CHIANG; Tsung-Yu ;   et al.
2015-08-06
Semiconductor Device With Gate Stacks And Method Of Manufacturing The Same
App 20150221743 - HO; Wei-Shuo ;   et al.
2015-08-06
Metal Gate Structure And Manufacturing Method Thereof
App 20150206963 - HO; WEI-SHUO ;   et al.
2015-07-23
Mechanisms For Forming Finfets With Different Fin Heights
App 20150187634 - CHIANG; Tsung-Yu ;   et al.
2015-07-02
Multi-depth Etching In Semiconductor Arrangement
App 20150069528 - Chiang; Tsung-Yu ;   et al.
2015-03-12
Multi-height Semiconductor Structures
App 20150061016 - Chiang; Tsung-Yu ;   et al.
2015-03-05
Apparatus And Method For Designing An Integrated Circuit Layout Having A Plurality Of Cell Technologies
App 20140344770 - CHIANG; Tsung-Yu ;   et al.
2014-11-20
Methods and Apparatus of Metal Gate Transistors
App 20140231932 - Chiang; Tsung-Yu ;   et al.
2014-08-21
Dynamic Tag Generating Apparatus And Dynamic Tag Generating Method Thereof For Use In Display Arratatus
App 20140144980 - LIU; Chi-Hsien ;   et al.
2014-05-29

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