Chiang; An-Min

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chiang; An-Min.The latest application filed is for "ldmos with independently biased source".

Company Profile

0.10.2

Chiang; An-Min - Hsinchu TW
Chiang; An-Min - Hsinchu City TW
Chiang; An Min - Hsin-Chu TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Isolation structure in field device Grant 7,911,022 - Wu , et al. March 22, 2	2011-03-22
Method for forming an integrated circuit with high voltage and low voltage devices Grant 7,247,909 - Chen , et al. July 24, 2	2007-07-24
LDMOS with independently biased source App 20070108517 - Wu; You-Kuo ; et al.	2007-05-17
Isolation structure in field device App 20060157816 - Wu; You-Kuo ; et al.	2006-07-20
Method of reducing dark current for an image sensor device via use of a polysilicon pad Grant 6,534,356 - Yang , et al. March 18, 2	2003-03-18
Method for improving the endurance of split gate flash EEPROM devices via the addition of a shallow source side implanted region Grant 5,915,178 - Chiang , et al. June 22, 1	1999-06-22
Oxidation method for removing fluorine gas inside polysilicon during semiconductor manufacturing to prevent delamination of subsequent layer induced by fluorine outgassing dielectric Grant 5,811,343 - Wann , et al. September 22, 1	1998-09-22
Method for preventing fluorine outgassing-induced interlevel dielectric delamination on P-channel FETS Grant 5,753,548 - Yu , et al. May 19, 1	1998-05-19
Method for preventing delamination of interlevel dielectric layer over FET P.sup.+ doped polysilicon gate electrodes on semiconductor integrated circuits Grant 5,707,896 - Chiang , et al. January 13, 1	1998-01-13
Method of multi-step reactive ion etch for patterning adjoining semiconductor metallization layers Grant 5,700,739 - Chiang , et al. December 23, 1	1997-12-23
Method for controlling the etch profile of an aperture formed through a multi-layer insulator layer Grant 5,652,172 - Yung-Sung , et al. July 29, 1	1997-07-29
Disposable metal anti-reflection coating process used together with metal dry/wet etch Grant 5,449,639 - Wei , et al. September 12, 1	1995-09-12

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