Chia; Chok J.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Chia; Chok J..The latest application filed is for "3d-interconnect".
Company Profile
2.53.19
- Chia; Chok J. - Cupertino CA
- Chia; Chok J. - Campbell CA
- Chia; Chok J. - Santa Clara CA
Patent Activity
| Patent | Date |
|---|---|
| 3d-Interconnect App 20210366857 - Chia; Chok J. ; et al. | 2021-11-25 |
| 3D-interconnect Grant 11,031,362 - Chia , et al. June 8, 2 | 2021-06-08 |
| 3D-Interconnect App 20190148324 - Chia; Chok J. ; et al. | 2019-05-16 |
| 3D-interconnect Grant 10,181,447 - Chia , et al. Ja | 2019-01-15 |
| 3d-interconnect App 20180308813 - Chia; Chok J. ; et al. | 2018-10-25 |
| Low cost hybrid high density package Grant 9,875,955 - Desai , et al. January 23, 2 | 2018-01-23 |
| Low cost hybrid high density package App 20170077018 - DESAI; Kishor ; et al. | 2017-03-16 |
| Low cost hybrid high density package Grant 9,508,687 - Desai , et al. November 29, 2 | 2016-11-29 |
| Low Cost Hybrid High Density Package App 20150171058 - Desai; Kishor ; et al. | 2015-06-18 |
| Low cost hybrid high density package Grant 8,963,310 - Desai , et al. February 24, 2 | 2015-02-24 |
| Area array quad flat no-lead (QFN) package Grant 8,525,312 - Low , et al. September 3, 2 | 2013-09-03 |
| Low Cost Hybrid High Density Package App 20130049179 - Desai; Kishor ; et al. | 2013-02-28 |
| Area Array Qfn App 20130037925 - Low; Qwai H. ; et al. | 2013-02-14 |
| Semiconductor package and method using isolated V.sub.SS plane to accommodate high speed circuitry ground isolation Grant 8,129,759 - Othieno , et al. March 6, 2 | 2012-03-06 |
| Wire bond integrated circuit package for high speed I/O Grant 7,804,167 - Fishley , et al. September 28, 2 | 2010-09-28 |
| Semiconductor Package And Method Using Isolated Vss Plane To Accommadate High Speed Circuitry Ground Isolation App 20100067207 - Othieno; Maurice O. ; et al. | 2010-03-18 |
| Semiconductor package and method using isolated V.sub.ss plane to accommodate high speed circuitry ground isolation Grant 7,646,091 - Othieno , et al. January 12, 2 | 2010-01-12 |
| Wire Bond Integrated Circuit Package For High Speed I/o App 20080128919 - Fishley; Clifford ; et al. | 2008-06-05 |
| Two layer substrate ball grid array design Grant 7,327,043 - Chia , et al. February 5, 2 | 2008-02-05 |
| Semiconductor package and method using isolated Vss plane to accommodate high speed circuitry ground isolation App 20070235849 - Othieno; Maurice O. ; et al. | 2007-10-11 |
| Two layer substrate ball grid array design App 20070040284 - Chia; Chok J. ; et al. | 2007-02-22 |
| Semiconductor package with wire bond arrangement to reduce cross talk for high speed circuits App 20060065983 - Chia; Chok J. ; et al. | 2006-03-30 |
| Laser removal of plating tails for high speed packages App 20060043565 - Chia; Chok J. ; et al. | 2006-03-02 |
| Insulated bonding wire tool for microelectronic packaging Grant 6,991,147 - Chia , et al. January 31, 2 | 2006-01-31 |
| Dielectric stack Grant 6,963,138 - Low , et al. November 8, 2 | 2005-11-08 |
| Buffer metal layer Grant 6,861,343 - Chia , et al. March 1, 2 | 2005-03-01 |
| Insulated bonding wire tool for microelectronic packaging App 20040182911 - Chia, Chok J. ; et al. | 2004-09-23 |
| Wire bonding to full array bonding pads on active circuitry App 20040178498 - Low, Qwai H. ; et al. | 2004-09-16 |
| Dielectric stack App 20040150069 - Low, Qwai H. ; et al. | 2004-08-05 |
| Bonding pad isolation Grant 6,743,979 - Berman , et al. June 1, 2 | 2004-06-01 |
| Buffer metal layer App 20040072414 - Chia, Chok J. ; et al. | 2004-04-15 |
| Insulated bonding wire for microelectronic packaging Grant 6,670,214 - Chia , et al. December 30, 2 | 2003-12-30 |
| Integrated circuit package Grant 6,603,200 - Low , et al. August 5, 2 | 2003-08-05 |
| Mechanically interlocking ball grid array packages and method of making Grant 6,512,293 - Chia , et al. January 28, 2 | 2003-01-28 |
| Apparatus and method for improving ball joints in semiconductor packages Grant 6,306,751 - Patel , et al. October 23, 2 | 2001-10-23 |
| Bondable anodized aluminum heatspreader for semiconductor packages Grant 6,297,550 - Chia , et al. October 2, 2 | 2001-10-02 |
| Grooved semiconductor die for flip-chip heat sink attachment Grant 6,225,695 - Chia , et al. May 1, 2 | 2001-05-01 |
| Method for planarizing an array of solder balls Grant 6,088,914 - Variot , et al. July 18, 2 | 2000-07-18 |
| System and method for packaging an integrated circuit using encapsulant injection Grant 6,081,997 - Chia , et al. July 4, 2 | 2000-07-04 |
| Thermally enhanced tape ball grid array package Grant 6,002,169 - Chia , et al. December 14, 1 | 1999-12-14 |
| Method for compensating for bottom warpage of a BGA integrated circuit Grant 5,989,937 - Variot , et al. November 23, 1 | 1999-11-23 |
| Process for using a removeable plating bus layer for high density substrates Grant 5,981,311 - Chia , et al. November 9, 1 | 1999-11-09 |
| Apparatus and method for stackable molded lead frame ball grid array packaging of integrated circuits Grant 5,973,393 - Chia , et al. October 26, 1 | 1999-10-26 |
| Method of providing electrical connection between an integrated circuit die and a printed circuit board Grant 5,933,710 - Chia , et al. August 3, 1 | 1999-08-03 |
| Semiconductor die having sacrificial bond pads for die test Grant 5,923,047 - Chia , et al. July 13, 1 | 1999-07-13 |
| Molded laminate package with integral mold gate Grant 5,886,398 - Low , et al. March 23, 1 | 1999-03-23 |
| Ball grid array package employing solid core solder balls Grant 5,841,198 - Chia , et al. November 24, 1 | 1998-11-24 |
| Ball grid array package employing raised metal contact rings Grant 5,841,191 - Chia , et al. November 24, 1 | 1998-11-24 |
| Stacked integrated chip package and method of making same Grant 5,814,881 - Alagaratnam , et al. September 29, 1 | 1998-09-29 |
| Method of planarizing an array of plastically deformable contacts on an integrated circuit package to compensate for surface warpage Grant 5,745,986 - Variot , et al. May 5, 1 | 1998-05-05 |
| Method of improving molding of an overmolded package body on a substrate Grant 5,744,084 - Chia , et al. April 28, 1 | 1998-04-28 |
| Printable superconductive leadframes for semiconductor device assembly Grant 5,728,599 - Rostoker , et al. March 17, 1 | 1998-03-17 |
| Process for manufacturing and mounting a semiconductor device leadframe having alignment tabs Grant 5,643,835 - Chia , et al. July 1, 1 | 1997-07-01 |
| Partially-molded, PCB chip carrier package for certain non-square die shapes Grant 5,594,626 - Rostoker , et al. January 14, 1 | 1997-01-14 |
| Method of cooling a packaged electronic device Grant 5,568,683 - Chia , et al. October 29, 1 | 1996-10-29 |
| Surface mount peripheral leaded and ball grid array package Grant 5,563,446 - Chia , et al. October 8, 1 | 1996-10-08 |
| Overmolded semiconductor package Grant 5,557,150 - Variot , et al. September 17, 1 | 1996-09-17 |
| Printed wiring board mounted semiconductor device having leadframe with alignment feature Grant 5,521,427 - Chia , et al. May 28, 1 | 1996-05-28 |
| High power dissipating packages with matched heatspreader heatsink assemblies Grant 5,463,529 - Chia , et al. October 31, 1 | 1995-10-31 |
| Integrated circuit having a coplanar solder ball contact array Grant 5,435,482 - Variot , et al. July 25, 1 | 1995-07-25 |
| Partially-molded, PCB chip carrier package for certain non-square die shapes Grant 5,434,750 - Rostoker , et al. July 18, 1 | 1995-07-18 |
| High power dissipating packages with matched heatspreader heatsink assemblies Grant 5,353,193 - Chia , et al. October 4, 1 | 1994-10-04 |
| O-ring package Grant 5,270,262 - Switky , et al. December 14, 1 | 1993-12-14 |
| Partially-molded, PCB chip carrier package Grant 5,262,927 - Chia , et al. November 16, 1 | 1993-11-16 |
| O-ring package Grant 5,185,653 - Switky , et al. February 9, 1 | 1993-02-09 |
| Plastic molded pin-grid-array power package Grant 4,868,349 - Chia September 19, 1 | 1989-09-19 |
| Method of molding a pin grid array package Grant 4,778,641 - Chia October 18, 1 | 1988-10-18 |
| Molded pin grid array package GPT Grant 4,688,152 - Chia August 18, 1 | 1987-08-18 |
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