loadpatents
Patent applications and USPTO patent grants for Chi; Kuan-Shou.The latest application filed is for "semiconductor device fault detection system and method".
Patent | Date |
---|---|
Semiconductor device fault detection system and method Grant 7,791,070 - Huang , et al. September 7, 2 | 2010-09-07 |
Seal ring structure for integrated circuit chips Grant 7,777,338 - Yao , et al. August 17, 2 | 2010-08-17 |
Non-repeated and non-uniform width seal ring structure Grant 7,265,436 - Huang , et al. September 4, 2 | 2007-09-04 |
Semiconductor bonding pad structure Grant 7,253,531 - Huang , et al. August 7, 2 | 2007-08-07 |
Semiconductor device fault detection system and method App 20070096092 - Huang; Tai-Chun ;   et al. | 2007-05-03 |
Multiple etch-stop layer deposition scheme and materials Grant 7,151,052 - Huang , et al. December 19, 2 | 2006-12-19 |
Multiple Etch-stop Layer Deposition Scheme And Materials App 20060246686 - Huang; Tai-Chun ;   et al. | 2006-11-02 |
Semiconductor chip singulation method Grant 7,098,077 - Huang , et al. August 29, 2 | 2006-08-29 |
Seal ring structure for integrated circuit chips App 20060055007 - Yao; Chih-Hsiang ;   et al. | 2006-03-16 |
Methods for enhancing die saw and packaging reliability App 20060055002 - Yao; Chih-Hsiang ;   et al. | 2006-03-16 |
Non-repeated and non-uniform width seal ring structure App 20050179213 - Huang, Tai-Chun ;   et al. | 2005-08-18 |
Semiconductor chip singulation method App 20050158967 - Huang, Tai-Chun ;   et al. | 2005-07-21 |
Chip orientation and attachment method App 20050133241 - Chi, Kuan-Shou ;   et al. | 2005-06-23 |
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