| Patent | Date |
|---|
SRAM with address dependent power usage
Grant 11,443,795 - Chevallier September 13, 2 | 2022-09-13 |
Non-uniform state spacing in multi-state memory element for low-power operation
Grant 11,127,458 - Kamalanathan , et al. September 21, 2 | 2021-09-21 |
Two-terminal reversibly switchable memory device
Grant 11,063,214 - Rinerson , et al. July 13, 2 | 2021-07-13 |
Two-terminal Reversibly Switchable Memory Device
App 20210193917 - RINERSON; Darrell ; et al. | 2021-06-24 |
Memory Element With A Reactive Metal Layer
App 20210013262 - CHEVALLIER; Christophe J. ; et al. | 2021-01-14 |
SRAM with error correction in retention mode
Grant 10,885,972 - Chevallier , et al. January 5, 2 | 2021-01-05 |
Memory element with a reactive metal layer
Grant 10,833,125 - Chevallier , et al. November 10, 2 | 2020-11-10 |
Memory element with a reactive metal layer
Grant 10,797,106 - Chevallier , et al. October 6, 2 | 2020-10-06 |
Two-terminal Reversibly Switchable Memory Device
App 20200259079 - A1 | 2020-08-13 |
SRAM with Error Correction in Retention Mode
App 20200227115 - Chevallier; Christophe J. ; et al. | 2020-07-16 |
Two-terminal reversibly switchable memory device
Grant 10,680,171 - Rinerson , et al. | 2020-06-09 |
SRAM with error correction in retention mode
Grant 10,629,257 - Chevallier , et al. | 2020-04-21 |
Memory Element With A Reactive Metal Layer
App 20190305047 - CHEVALLIER; Christophe J. ; et al. | 2019-10-03 |
SRAM with Error Correction in Retention Mode
App 20190259450 - Chevallier; Christophe J. ; et al. | 2019-08-22 |
SRAM with multiple power domains
Grant 10,347,328 - Chevallier , et al. July 9, 2 | 2019-07-09 |
Memory element with a reactive metal layer
Grant 10,340,312 - Chevallier , et al. | 2019-07-02 |
Method and apparatus for controlling substrate and well biases for reduced power requirements
Grant 10,332,589 - Hanson , et al. | 2019-06-25 |
SRAM with error correction in retention mode
Grant 10,319,429 - Chevallier , et al. | 2019-06-11 |
Two-terminal Reversibly Switchable Memory Device
App 20190173006 - RINERSON; Darrell ; et al. | 2019-06-06 |
Write assist thyristor-based SRAM circuits and methods of operation
Grant 10,283,185 - Luan , et al. | 2019-05-07 |
SRAM with Error Correction in Retention Mode
App 20190074056 - Chevallier; Christophe J. ; et al. | 2019-03-07 |
Two-terminal reversibly switchable memory device
Grant 10,224,480 - Rinerson , et al. | 2019-03-05 |
SRAM With Address Dependent Power Usage
App 20190019550 - Chevallier; Christophe J. | 2019-01-17 |
Sram With Multiple Power Domains
App 20180336945 - Chevallier; Christophe J. ; et al. | 2018-11-22 |
SRAM with error correction in retention mode
Grant 10,096,354 - Chevallier , et al. October 9, 2 | 2018-10-09 |
SRAM with multiple power domains
Grant 10,062,431 - Chevallier , et al. August 28, 2 | 2018-08-28 |
Cross-coupled thyristor SRAM semiconductor structures and methods of fabrication
Grant 10,056,389 - Luan , et al. August 21, 2 | 2018-08-21 |
Low Power Buffer with Voltage Conversion
App 20180226972 - Chevallier; Christophe J. | 2018-08-09 |
Sram With Active Substrate Bias
App 20180211702 - Hanson; Scott ; et al. | 2018-07-26 |
Two-terminal Reversibly Switchable Memory Device
App 20180130946 - Rinerson; Darrell ; et al. | 2018-05-10 |
SRAM With Multiple Power Domains
App 20180130520 - Chevallier; Christophe J. ; et al. | 2018-05-10 |
Memory Element With A Reactive Metal Layer
App 20180122857 - Chevallier; Christophe J. ; et al. | 2018-05-03 |
Two-transistor SRAM semiconductor structure and methods of fabrication
Grant 9,899,389 - Luan , et al. February 20, 2 | 2018-02-20 |
SRAM with active substrate bias
Grant 9,830,974 - Hanson , et al. November 28, 2 | 2017-11-28 |
Preservation circuit and methods to maintain values representing data in one or more layers of memory
Grant 9,830,985 - Chevallier , et al. November 28, 2 | 2017-11-28 |
Two-terminal reversibly switchable memory device
Grant 9,831,425 - Rinerson , et al. November 28, 2 | 2017-11-28 |
Memory element with a reactive metal layer
Grant 9,806,130 - Chevallier , et al. October 31, 2 | 2017-10-31 |
Sub-threshold Enabled Flash Memory System
App 20170287534 - Chevallier; Christophe J. ; et al. | 2017-10-05 |
Sub-threshold enabled flash memory system
Grant 9,779,788 - Chevallier , et al. October 3, 2 | 2017-10-03 |
Six-transistor SRAM semiconductor structures and methods of fabrication
Grant 9,748,223 - Luan , et al. August 29, 2 | 2017-08-29 |
Memory Element With A Reactive Metal Layer
App 20170179197 - Chevallier; Christophe J. ; et al. | 2017-06-22 |
Preservation Circuit And Methods To Maintain Values Representing Data In One Or More Layers Of Memory
App 20170162261 - Chevallier; Christophe J. ; et al. | 2017-06-08 |
Six-Transistor SRAM Semiconductor Structures and Methods of Fabrication
App 20170148782 - Luan; Harry ; et al. | 2017-05-25 |
Two-Transistor SRAM Semiconductor Structure and Methods of Fabrication
App 20170148795 - Luan; Harry ; et al. | 2017-05-25 |
Access Signal Conditioning For Memory Cells In An Array
App 20170140816 - Chevallier; Christophe J. ; et al. | 2017-05-18 |
Cross-coupled thyristor SRAM semiconductor structures and methods of fabrication
Grant 9,613,968 - Luan , et al. April 4, 2 | 2017-04-04 |
Memory element with a reactive metal layer
Grant 9,570,515 - Chevallier , et al. February 14, 2 | 2017-02-14 |
1D-2R memory architecture
Grant 9,570,165 - Sekar , et al. February 14, 2 | 2017-02-14 |
Two-transistor SRAM semiconductor structure and methods of fabrication
Grant 9,564,441 - Luan , et al. February 7, 2 | 2017-02-07 |
Six-transistor SRAM semiconductor structures and methods of fabrication
Grant 9,564,198 - Luan , et al. February 7, 2 | 2017-02-07 |
Access signal adjustment circuits and methods for memory cells in a cross-point array
Grant 9,514,811 - Chevallier , et al. December 6, 2 | 2016-12-06 |
Six-transistor thyristor SRAM circuits and methods of operation
Grant 9,496,020 - Luan , et al. November 15, 2 | 2016-11-15 |
Two-transistor thyristor SRAM circuit and methods of operation
Grant 9,460,771 - Luan , et al. October 4, 2 | 2016-10-04 |
Cross-coupled thyristor SRAM circuits and methods of operation
Grant 9,449,669 - Luan , et al. September 20, 2 | 2016-09-20 |
Access Signal Adjustment Circuits And Methods For Memory Cells In A Cross-point Array
App 20160172025 - Chevallier; Christophe J. ; et al. | 2016-06-16 |
Cross-Coupled Thyristor SRAM Semiconductor Structures and Methods of Fabrication
App 20160148940 - Luan; Harry ; et al. | 2016-05-26 |
Cross-Coupled Thyristor SRAM Circuits and Methods of Operation
App 20160093367 - Luan; Harry ; et al. | 2016-03-31 |
Cross-Coupled Thyristor SRAM Semiconductor Structures and Methods of Fabrication
App 20160093622 - Luan; Harry ; et al. | 2016-03-31 |
Six-Transistor SRAM Circuits and Methods of Operation
App 20160093368 - Luan; Harry ; et al. | 2016-03-31 |
Six-Transistor SRAM Semiconductor Structures and Methods of Fabrication
App 20160093607 - Luan; Harry ; et al. | 2016-03-31 |
Two-Transistor SRAM Semiconductor Structure and Methods of Fabrication
App 20160093623 - Luan; Harry ; et al. | 2016-03-31 |
Two-Transistor SRAM Circuit and Methods of Fabrication
App 20160093362 - Luan; Harry ; et al. | 2016-03-31 |
Write Assist SRAM Circuits and Methods of Operation
App 20160093369 - Luan; Harry ; et al. | 2016-03-31 |
Access signal adjustment circuits and methods for memory cells in a cross-point array
Grant 9,299,427 - Chevallier , et al. March 29, 2 | 2016-03-29 |
Memory Element With A Reactive Metal Layer
App 20160005793 - Chevallier; Christophe J. ; et al. | 2016-01-07 |
Two-terminal Reversibly Switchable Memory Device
App 20150380642 - Rinerson; Darrell ; et al. | 2015-12-31 |
Memory element with a reactive metal layer
Grant 9,159,408 - Chevallier , et al. October 13, 2 | 2015-10-13 |
Two-terminal reversibly switchable memory device
Grant 9,159,913 - Rinerson , et al. October 13, 2 | 2015-10-13 |
Access Signal Adjustment Circuits And Methods For Memory Cells In A Cross-point Array
App 20150179250 - Chevallier; Christophe J. ; et al. | 2015-06-25 |
1d-2r Memory Architecture
App 20150162382 - Sekar; Deepak Chandra ; et al. | 2015-06-11 |
Access signal adjustment circuits and methods for memory cells in a cross-point array
Grant 8,988,930 - Chevallier , et al. March 24, 2 | 2015-03-24 |
Two-terminal Reversibly Switchable Memory Device
App 20150029780 - Rinerson; Darrell ; et al. | 2015-01-29 |
Access Signal Adjustment Circuits And Methods For Memory Cells In A Cross-point Array
App 20140219006 - Chevallier; Christophe J. ; et al. | 2014-08-07 |
Memory Element With a Reactive Metal Layer
App 20140211542 - Chevallier; Christophe J. ; et al. | 2014-07-31 |
Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory
Grant 8,427,868 - Chevallier , et al. April 23, 2 | 2013-04-23 |
CMOS imager with integrated circuitry
Grant 8,384,814 - Chevallier February 26, 2 | 2013-02-26 |
Apparatus and method for detecting over-programming condition in multistate memory device
Grant 8,369,145 - Norman , et al. February 5, 2 | 2013-02-05 |
Circuits and techniques to compensate data signals for variations of parameters affecting memory cells in cross-point arrays
Grant 8,363,443 - Chevallier , et al. January 29, 2 | 2013-01-29 |
Apparatus And Method For Detecting Over-programming Condition In Multistate Memory Device
App 20120192018 - Norman; Robert D. ; et al. | 2012-07-26 |
Cmos Imager With Integrated Circuitry
App 20120099011 - Chevallier; Christophe J. | 2012-04-26 |
Two Terminal Re Writeable Non Volatile Ion Transport Memory Device
App 20120087174 - RINERSON; DARRELL ; et al. | 2012-04-12 |
Method For Fabricating Multi Resistive State Memory Devices
App 20120064691 - RINERSON; DARRELL ; et al. | 2012-03-15 |
Apparatus and method for detecting over-programming condition in multistate memory device
Grant 8,130,549 - Norman , et al. March 6, 2 | 2012-03-06 |
Memory Element With A Reactive Metal Layer
App 20120033481 - RINERSON; DARRELL ; et al. | 2012-02-09 |
CMOS imager with integrated circuitry
Grant 8,089,542 - Chevallier January 3, 2 | 2012-01-03 |
Threshold Device For A Memory Array
App 20110291067 - BREWER; JULIE CASPERSON ; et al. | 2011-12-01 |
Method for fabricating multi-resistive state memory devices
Grant 8,062,942 - Rinerson , et al. November 22, 2 | 2011-11-22 |
Cmos Imager With Integrated Circuitry
App 20110228153 - Chevallier; Christophe J. | 2011-09-22 |
Threshold device for a memory array
Grant 7,995,371 - Rinerson , et al. August 9, 2 | 2011-08-09 |
Circuits and techniques to compensate data signals for variations of parameters affecting memory cells in cross-point arrays
App 20110188283 - Chevallier; Christophe J. ; et al. | 2011-08-04 |
Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory
App 20110188284 - Chevallier; Christophe J. ; et al. | 2011-08-04 |
Multi-resistive state memory device with conductive oxide electrodes
App 20110186803 - Rinerson; Darrell ; et al. | 2011-08-04 |
Memory architectures and techniques to enhance throughput for cross-point arrays
App 20110188282 - Chevallier; Christophe J. ; et al. | 2011-08-04 |
CMOS imager with integrated circuitry
Grant 7,952,631 - Chevallier May 31, 2 | 2011-05-31 |
Preservation circuit and methods to maintain values representing data in one or more layers of memory
Grant 7,898,841 - Chevallier , et al. March 1, 2 | 2011-03-01 |
Selection device for re-writable memory
Grant 7,884,349 - Rinerson , et al. February 8, 2 | 2011-02-08 |
Contemporaneous margin verification and memory access for memory cells in cross point memory arrays
Grant 7,830,701 - Siau , et al. November 9, 2 | 2010-11-09 |
Preservation circuit and methods to maintain values representing data in one or more layers of memory
App 20100259969 - Chevallier; Christophe J. ; et al. | 2010-10-14 |
Multi-resistive state memory device with conductive oxide electrodes
App 20100157657 - Rinerson; Darrell ; et al. | 2010-06-24 |
Memory access circuits and layout of the same for cross-point memory arrays
App 20100157647 - Rinerson; Darrell ; et al. | 2010-06-24 |
Preservation circuit and methods to maintain values representing data in one or more layers of memory
Grant 7,719,876 - Chevallier , et al. May 18, 2 | 2010-05-18 |
Low read current architecture for memory
Grant 7,701,791 - Rinerson , et al. April 20, 2 | 2010-04-20 |
Preservation circuit and methods to maintain values representing data in one or more layers of memory
App 20100027314 - Chevallier; Christophe J. ; et al. | 2010-02-04 |
Multi-resistive state memory device with conductive oxide electrodes
Grant 7,633,790 - Rinerson , et al. December 15, 2 | 2009-12-15 |
Cmos Imager With Integrated Non-volatile Memory
App 20090284623 - Chevallier; Christophe J. | 2009-11-19 |
Four vertically stacked memory layers in a non-volatile re-writeable memory device
App 20090213633 - Rinerson; Darrell ; et al. | 2009-08-27 |
CMOS imager with integrated non-volatile memory
Grant 7,569,414 - Chevallier August 4, 2 | 2009-08-04 |
Method for sensing a signal in a two-terminal memory array having leakage current
Grant 7,505,347 - Rinerson , et al. March 17, 2 | 2009-03-17 |
Multi-resistive state memory device with conductive oxide electrodes
App 20090045390 - Rinerson; Darrel ; et al. | 2009-02-19 |
Threshold device for a memory array
App 20090027976 - Brewer; Julie Casperson ; et al. | 2009-01-29 |
Selection device for Re-Writable memory
App 20090016094 - Rinerson; Darrell ; et al. | 2009-01-15 |
Method for fabricating multi-resistive state memory devices
App 20080293196 - Rinerson; Darrell ; et al. | 2008-11-27 |
Two terminal memory array having reference cells
Grant 7,457,147 - Rinerson , et al. November 25, 2 | 2008-11-25 |
Apparatus and method for detecting over-programming condition in multistate memory device
Grant 7,457,997 - Norman , et al. November 25, 2 | 2008-11-25 |
Method for two-cycle sensing in a two-terminal memory array having leakage current
Grant 7,436,723 - Rinerson , et al. October 14, 2 | 2008-10-14 |
Mode entry circuit and method
Grant 7,437,647 - Chevallier October 14, 2 | 2008-10-14 |
Two terminal memory array having reference cells
Grant 7,382,644 - Rinerson , et al. June 3, 2 | 2008-06-03 |
Two terminal memory array having reference cells
Grant 7,382,645 - Rinerson , et al. June 3, 2 | 2008-06-03 |
Providing a reference voltage to a cross point memory array
Grant 7,327,601 - Rinerson , et al. February 5, 2 | 2008-02-05 |
Two terminal memory array having reference cells
App 20080002461 - Rinerson; Darrell ; et al. | 2008-01-03 |
Providing A Reference Voltage To A Cross Point Memory Array
App 20070279961 - Rinerson; Darrell ; et al. | 2007-12-06 |
Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
Grant 7,251,187 - Lakhani , et al. July 31, 2 | 2007-07-31 |
Non-volatile memory with test rows for disturb detection
Grant 7,248,515 - Chevallier July 24, 2 | 2007-07-24 |
Conductive memory stack with sidewall
App 20070158716 - Rinerson; Darrell ; et al. | 2007-07-12 |
Erase verify for non-volatile memory using a bitline current-to-voltage converter
Grant 7,236,400 - Chevallier June 26, 2 | 2007-06-26 |
Method for erase-verifying a non-volatile memory capable of identifying over-erased and under-erased memory cells
Grant 7,236,399 - Chevallier June 26, 2 | 2007-06-26 |
Erase verify for non-volatile memory using bitline/reference current-to-voltage converters
Grant 7,230,855 - Chevallier June 12, 2 | 2007-06-12 |
Cross point memory array with fast access time
Grant 7,227,767 - Rinerson , et al. June 5, 2 | 2007-06-05 |
Two terminal memory array having reference cells
Grant 7,227,775 - Rinerson , et al. June 5, 2 | 2007-06-05 |
Apparatus and method for detecting over-programming condition in multistate memory device
App 20070101184 - Norman; Robert D. ; et al. | 2007-05-03 |
Non-volatile memory with erase verify circuit having comparators indicating under-erasure, erasure, and over-erasure of memory cells
Grant 7,196,934 - Chevallier March 27, 2 | 2007-03-27 |
Erase verify for nonvolatile memory using reference current-to-voltage converters
Grant 7,167,396 - Chevallier January 23, 2 | 2007-01-23 |
Erase verify for non-volatile memory
App 20070008783 - Chevallier; Christophe J. | 2007-01-11 |
Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
Grant 7,133,323 - Lakhani , et al. November 7, 2 | 2006-11-07 |
Cross point memory array with fast access time
App 20060243956 - Rinerson; Darrell ; et al. | 2006-11-02 |
Multi-resistive state element with reactive metal
App 20060245243 - Rinerson; Darrell ; et al. | 2006-11-02 |
Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
Grant 7,130,239 - Lakhani , et al. October 31, 2 | 2006-10-31 |
Erase verify for nonvolatile memory using bitline/reference current-to-voltage converters
Grant 7,123,516 - Chevallier October 17, 2 | 2006-10-17 |
Erase verify for non-volatile memory using a reference current-to-voltage converter
Grant 7,123,513 - Chevallier October 17, 2 | 2006-10-17 |
Erase verify for non-volatile memory
App 20060181930 - Chevallier; Christophe J. | 2006-08-17 |
Memory using mixed valence conductive oxides
App 20060171200 - Rinerson; Darrell ; et al. | 2006-08-03 |
Conductive memory stack with non-uniform width
App 20060166430 - Rinerson; Darrell ; et al. | 2006-07-27 |
Layout of driver sets in a cross point memory array
Grant 7,079,442 - Rinerson , et al. July 18, 2 | 2006-07-18 |
Two terminal memory array having reference cells
Grant 7,075,817 - Rinerson , et al. July 11, 2 | 2006-07-11 |
Multi-resistive state material that uses dopants
Grant 7,071,008 - Rinerson , et al. July 4, 2 | 2006-07-04 |
Conductive memory device with conductive oxide electrodes
Grant 7,067,862 - Rinerson , et al. June 27, 2 | 2006-06-27 |
Cross point memory array with fast access time
Grant 7,057,914 - Rinerson , et al. June 6, 2 | 2006-06-06 |
Erase verify for non-volatile memory
Grant 7,057,935 - Chevallier June 6, 2 | 2006-06-06 |
Flash memory with fast boot block access
Grant 7,054,198 - Chevallier , et al. May 30, 2 | 2006-05-30 |
Memory array with high temperature wiring
Grant 7,042,035 - Rinerson , et al. May 9, 2 | 2006-05-09 |
2-terminal trapped charge memory device with voltage switchable multi-level resistance
Grant 7,038,935 - Rinerson , et al. May 2, 2 | 2006-05-02 |
Providing a reference voltage to a cross point memory array
App 20060083055 - Rinerson; Darrell ; et al. | 2006-04-20 |
Cross point array using distinct voltages
Grant 7,020,012 - Rinerson , et al. March 28, 2 | 2006-03-28 |
Line drivers that use minimal metal layers
Grant 7,009,909 - Rinerson , et al. March 7, 2 | 2006-03-07 |
Conductive memory stack with non-uniform width
Grant 7,009,235 - Rinerson , et al. March 7, 2 | 2006-03-07 |
Non-volatile memory with test rows for disturb detection
Grant 6,999,363 - Chevallier February 14, 2 | 2006-02-14 |
Adaptive programming technique for a re-writable conductive memory device
App 20060007769 - Rinerson; Darrell ; et al. | 2006-01-12 |
Mode entry circuit and method
App 20060002209 - Chevallier; Christophe J. | 2006-01-05 |
Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
App 20050281121 - Lakhani, Vinod C. ; et al. | 2005-12-22 |
Memory system, method and predeconding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
App 20050281120 - Lakhani, Vinod C. ; et al. | 2005-12-22 |
Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
App 20050281122 - Lakhani, Vinod C. ; et al. | 2005-12-22 |
Erase verify for non-volatile memory
App 20050270839 - Chevallier, Christophe J. | 2005-12-08 |
Erase verify for non-volatile memory
App 20050270836 - Chevallier, Christophe J. | 2005-12-08 |
Erase verify for non-volatile memory
App 20050270834 - Chevallier, Christophe J. | 2005-12-08 |
Erase verify for non-volatile memory
App 20050270837 - Chevallier, Christophe J. | 2005-12-08 |
Erase verify for non-volatile memory
App 20050270838 - Chevallier, Christophe J. | 2005-12-08 |
Erase verify for non-volatile memory
App 20050270835 - Chevallier, Christophe J. | 2005-12-08 |
Erase verify for non-volatile memory
App 20050270860 - Chevallier, Christophe J. | 2005-12-08 |
Memory element having islands
Grant 6,972,985 - Rinerson , et al. December 6, 2 | 2005-12-06 |
Providing a reference voltage to a cross point memory array
Grant 6,970,375 - Rinerson , et al. November 29, 2 | 2005-11-29 |
Memory Element Having Islands
App 20050243595 - Rinerson, Darrell ; et al. | 2005-11-03 |
Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous reading writing or erasure
Grant 6,961,805 - Lakhani , et al. November 1, 2 | 2005-11-01 |
Re-writable memory with multiple memory layers
App 20050231992 - Rinerson, Darrell ; et al. | 2005-10-20 |
Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
Grant 6,954,400 - Lakhani , et al. October 11, 2 | 2005-10-11 |
Flash memory with fast boot block access
App 20050207224 - Chevallier, Christophe J. ; et al. | 2005-09-22 |
Mode entry circuit and method
Grant 6,944,812 - Chevallier September 13, 2 | 2005-09-13 |
Non-volatile memory with a single transistor and resistive memory element
App 20050195632 - Rinerson, Darrell ; et al. | 2005-09-08 |
Adaptive programming technique for a re-writable conductive memory device
Grant 6,940,744 - Rinerson , et al. September 6, 2 | 2005-09-06 |
Segmented non-volatile memory array with multiple sources having improved source line decode circuitry
App 20050190638 - Chevallier, Christophe J. ; et al. | 2005-09-01 |
Flash memory with fast boot block access
Grant 6,937,519 - Chevallier , et al. August 30, 2 | 2005-08-30 |
Multi-resistive state element with reactive metal
App 20050174835 - Rinerson, Darrell ; et al. | 2005-08-11 |
Segmented non-volatile memory array with multiple sources having improved source line decode circuitry
Grant 6,914,813 - Chevallier , et al. July 5, 2 | 2005-07-05 |
Conductive memory array having page mode and burst mode write capability
App 20050135147 - Rinerson, Darrell ; et al. | 2005-06-23 |
Conductive memory array having page mode and burst mode read capability
App 20050135148 - Chevallier, Christophe J. ; et al. | 2005-06-23 |
Multiple modes of operation in a cross point array
Grant 6,909,632 - Rinerson , et al. June 21, 2 | 2005-06-21 |
Re-writable memory with multiple memory layers
Grant 6,906,939 - Rinerson , et al. June 14, 2 | 2005-06-14 |
Voltage converter system and method having a stable output voltage
Grant 6,900,625 - Chevallier , et al. May 31, 2 | 2005-05-31 |
Cross point array using distinct voltages
App 20050111263 - Rinerson, Darrell ; et al. | 2005-05-26 |
CMOS imager with integrated non-volatile memory
App 20050112792 - Chevallier, Christophe J. | 2005-05-26 |
Conductive Memory Stack With Non-uniform Width
App 20050101086 - Rinerson, Darrell ; et al. | 2005-05-12 |
Non-volatile memory with test rows for disturb detection
App 20050078515 - Chevallier, Christophe J. | 2005-04-14 |
CMOS imager with integrated non-volatile memory
Grant 6,879,340 - Chevallier April 12, 2 | 2005-04-12 |
Re-writable memory with non-linear memory element
Grant 6,870,755 - Rinerson , et al. March 22, 2 | 2005-03-22 |
Memory array of a non-volatile ram
Grant 6,859,382 - Rinerson , et al. February 22, 2 | 2005-02-22 |
Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
Grant 6,856,571 - Lakhani , et al. February 15, 2 | 2005-02-15 |
Non-volatile memory with a single transistor and resistive memory element
Grant 6,856,536 - Rinerson , et al. February 15, 2 | 2005-02-15 |
Non-volatile memory with test rows for disturb detection
Grant 6,853,598 - Chevallier February 8, 2 | 2005-02-08 |
Cross point memory array with memory plugs exhibiting a characteristic hysteresis
Grant 6,850,429 - Rinerson , et al. February 1, 2 | 2005-02-01 |
Multiplexor having a reference voltage on unselected lines
Grant 6,850,455 - Rinerson , et al. February 1, 2 | 2005-02-01 |
Multiple modes of operation in a cross point array
App 20050013172 - Rinerson, Darrell ; et al. | 2005-01-20 |
Power throughput adjustment in flash memory
Grant 6,845,053 - Chevallier January 18, 2 | 2005-01-18 |
Line drivers that fit within a specified line pitch
Grant 6,836,421 - Rinerson , et al. December 28, 2 | 2004-12-28 |
Cross point memory array using multiple modes of operation
Grant 6,834,008 - Rinerson , et al. December 21, 2 | 2004-12-21 |
Cross point memory array using distinct voltages
Grant 6,831,854 - Rinerson , et al. December 14, 2 | 2004-12-14 |
Conductive Memory Stack With Sidewall
App 20040228172 - Rinerson, Darrell ; et al. | 2004-11-18 |
Externally triggered leakage detection and repair in a flash memory device
Grant 6,813,183 - Chevallier November 2, 2 | 2004-11-02 |
Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
Grant 6,809,987 - Lakhani , et al. October 26, 2 | 2004-10-26 |
Multi-output multiplexor
Grant 6,798,685 - Rinerson , et al. September 28, 2 | 2004-09-28 |
Voltage converter system and method having a stable output voltage
Grant 6,788,037 - Chevallier , et al. September 7, 2 | 2004-09-07 |
Rewritable Memory With Non-linear Memory Element
App 20040170040 - Rinerson, Darrell ; et al. | 2004-09-02 |
Cross Point Memory Array Using Multiple Modes Of Operation
App 20040160818 - Rinerson, Darrell ; et al. | 2004-08-19 |
Re-writable memory with multiple memory layers
App 20040160820 - Rinerson, Darrell ; et al. | 2004-08-19 |
Providing a reference voltage to a cross point memory array
App 20040160806 - Rinerson, Darrell ; et al. | 2004-08-19 |
Line Drivers That Fit Within A Specified Line Pitch
App 20040160849 - Rinerson, Darrell ; et al. | 2004-08-19 |
Cross point memory array with fast access time
App 20040160848 - Rinerson, Darrell ; et al. | 2004-08-19 |
Memory Array Of A Non-volatile Ram
App 20040160804 - Rinerson, Darrell ; et al. | 2004-08-19 |
Non-volatile Memory With A Single Transistor And Resistive Memory Element
App 20040160817 - Rinerson, Darrell ; et al. | 2004-08-19 |
Cross Point Memory Array Using Distinct Voltages
App 20040160808 - Rinerson, Darrell ; et al. | 2004-08-19 |
Multiplexor having a reference voltage on unselected lines
App 20040160841 - Rinerson, Darrell ; et al. | 2004-08-19 |
Multi-resistive State Material That Uses Dopants
App 20040161888 - Rinerson, Darrell ; et al. | 2004-08-19 |
Adaptive programming technique for a re-writable conductive memory device
App 20040160798 - Rinerson, Darrell ; et al. | 2004-08-19 |
Memory array with high temperature wiring
App 20040159869 - Rinerson, Darrell ; et al. | 2004-08-19 |
2-Terminal trapped charge memory device with voltage switchable multi-level resistance
App 20040160812 - Rinerson, Darrell ; et al. | 2004-08-19 |
Line drivers that use minimal metal layers
App 20040160846 - Rinerson, Darrell ; et al. | 2004-08-19 |
Cross point memory array with memory plugs exhibiting a characteristic hysteresis
App 20040160807 - Rinerson, Darrell ; et al. | 2004-08-19 |
Conductive memory device with barrier electrodes
App 20040159868 - Rinerson, Darrell ; et al. | 2004-08-19 |
Resistive memory device with a treated interface
App 20040159828 - Rinerson, Darrell ; et al. | 2004-08-19 |
Apparatus and method for detecting over-programming condition in multistate memory device
App 20040153817 - Norman, Robert D. ; et al. | 2004-08-05 |
Voltage converter system and method having a stable output voltage
Grant 6,765,376 - Chevallier , et al. July 20, 2 | 2004-07-20 |
Segmented non-volatile memory array with multiple sources having improved source line decode circuitry
Grant 6,760,267 - Chevallier , et al. July 6, 2 | 2004-07-06 |
Cross point memory array using multiple thin films
Grant 6,753,561 - Rinerson , et al. June 22, 2 | 2004-06-22 |
Flash memory with fast boot block access
App 20040111554 - Chevallier, Christophe J. ; et al. | 2004-06-10 |
Power throughput adjustment in flash memory
App 20040095834 - Chevallier, Christophe J. | 2004-05-20 |
Flash memory with fast boot block access
Grant 6,671,769 - Chevallier , et al. December 30, 2 | 2003-12-30 |
Leakage detection in programming algorithm for a flash memory device
Grant 6,661,720 - Chevallier December 9, 2 | 2003-12-09 |
Leakage detection in programming algorithm for a flash memory device
Grant 6,650,585 - Chevallier November 18, 2 | 2003-11-18 |
Voltage converter system and method having a stable output voltage
App 20030169608 - Chevallier, Christophe J. ; et al. | 2003-09-11 |
Voltage converter system and method having a stable output voltage
App 20030169610 - Chevallier, Christophe J. ; et al. | 2003-09-11 |
Voltage converter system and method having a stable output voltage
App 20030169609 - Chevallier, Christophe J. ; et al. | 2003-09-11 |
Non-volatile memory with test rows for disturb detection
App 20030161205 - Chevallier, Christophe J. | 2003-08-28 |
Apparatus and method for detecting over-programming condition in multistate memory device
Grant 6,601,191 - Norman , et al. July 29, 2 | 2003-07-29 |
Non-volatile memory with test rows for disturb detection
Grant 6,597,609 - Chevallier July 22, 2 | 2003-07-22 |
Mode entry circuit and method
App 20030135801 - Chevallier, Christophe J. | 2003-07-17 |
Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
App 20030126386 - Lakhani, Vinod C. ; et al. | 2003-07-03 |
Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
App 20030126384 - Lakhani, Vinod C. ; et al. | 2003-07-03 |
Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
App 20030126385 - Lakhani, Vinod C. ; et al. | 2003-07-03 |
Method for performing analog over-program and under-program detection for a multistate memory cell
Grant 6,577,532 - Chevallier June 10, 2 | 2003-06-10 |
Memory system having flexible bus structure and method
Grant 6,567,335 - Norman , et al. May 20, 2 | 2003-05-20 |
Erase verify for non-volatile memory
App 20030048664 - Chevallier, Christophe J. | 2003-03-13 |
Non-volatile memory with test rows for disturb detection
App 20030043661 - Chevallier, Christophe J. | 2003-03-06 |
Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
Grant 6,507,885 - Lakhani , et al. January 14, 2 | 2003-01-14 |
Leakage detection in programming algorithm for a flash memory device
App 20030007402 - Chevallier, Christophe J. | 2003-01-09 |
Timer circuit with programmable decode circuitry
Grant 6,504,891 - Chevallier January 7, 2 | 2003-01-07 |
Segmented non-volatile memory array with multiple sources having improved source line decode circuitry
App 20020196696 - Chevallier, Christophe J. ; et al. | 2002-12-26 |
Externally triggered leakage detection and repair in a flash memory device
App 20020191440 - Chevallier, Christophe J. | 2002-12-19 |
Segmented non-volatile memory array with multiple sources having improved source line decode circuitry
App 20020191474 - Chevallier, Christophe J. ; et al. | 2002-12-19 |
Memory architecture and addressing for optimized density in integrated circuit package or on circuit board
Grant 6,496,400 - Chevallier December 17, 2 | 2002-12-17 |
Leakage detection in programming algorithm for a flash memory device
Grant 6,493,270 - Chevallier December 10, 2 | 2002-12-10 |
Leakage Detection In Programming Algorithm For A Flash Memory Device
App 20020145916 - CHEVALLIER, CHRISTOPHE J. | 2002-10-10 |
Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
App 20020099903 - Lakhani, Vinod C. ; et al. | 2002-07-25 |
Methods for alternate bitline stress testing
Grant 6,370,070 - Chevallier , et al. April 9, 2 | 2002-04-09 |
Memory system having flexible architecture and method
Grant 6,363,454 - Lakhani , et al. March 26, 2 | 2002-03-26 |
Architecture for state machine for controlling internal operations of flash memory
Grant 6,356,974 - Chevallier March 12, 2 | 2002-03-12 |
Memory system having flexible bus structure and method
Grant 6,353,571 - Norman , et al. March 5, 2 | 2002-03-05 |
Methods for alternate bitline stress testing
App 20020024861 - Chevallier, Christophe J. ; et al. | 2002-02-28 |
Memory system having flexible addressing and method
App 20020002653 - Lakhani, Vinod C. ; et al. | 2002-01-03 |
Clocking scheme and charge transfer switch for increasing the efficiency of a charge pump or other circuit
Grant 6,307,425 - Chevallier , et al. October 23, 2 | 2001-10-23 |
Method and circuitry for performing analog over-program and under-program detection for a multistate memory cell
Grant 6,278,632 - Chevallier August 21, 2 | 2001-08-21 |
Architecture For State Machine For Controlling Internal Operations Of Flash Memory
App 20010011320 - CHEVALLIER, CHRISTOPHE J. | 2001-08-02 |
Memory architecture and addressing for optimized density in integrated circuit package or on circuit board
App 20010005324 - Chevallier, Christophe J. | 2001-06-28 |
Memory system having flexible addressing and method using tag and data bus communication
Grant 6,253,277 - Lakhani , et al. June 26, 2 | 2001-06-26 |
Power level detection circuit
Grant 6,229,352 - Chevallier , et al. May 8, 2 | 2001-05-08 |
Memory system having flexible bus structure and method
Grant 6,212,123 - Norman , et al. April 3, 2 | 2001-04-03 |
Memory architecture and addressing for optimized density in integrated circuit package or on circuit board
Grant 6,188,595 - Chevallier February 13, 2 | 2001-02-13 |
Method for performing analog over-program and under-program detection for a multistate memory cell
Grant 6,163,479 - Chevallier December 19, 2 | 2000-12-19 |
Clock signal from an adjustable oscillator for an integrated circuit
Grant 6,160,755 - Norman , et al. December 12, 2 | 2000-12-12 |
Clocking scheme and charge transfer switch for increasing the efficiency of a charge pump or other circuit
Grant 6,154,088 - Chevallier , et al. November 28, 2 | 2000-11-28 |
Apparatus and method for detecting over-programming condition in multistate memory device
Grant 6,112,314 - Norman , et al. August 29, 2 | 2000-08-29 |
Leakage detection in flash memory cell
Grant 6,108,241 - Chevallier August 22, 2 | 2000-08-22 |
Memory system having flexible addressing and method using tag and data bus communication
Grant 6,078,985 - Lakhani , et al. June 20, 2 | 2000-06-20 |
Apparatus and method for reading state of multistate non-volatile memory cells
Grant 6,078,518 - Chevallier June 20, 2 | 2000-06-20 |
Memory system having flexible architecture and method
Grant 6,073,204 - Lakhani , et al. June 6, 2 | 2000-06-06 |
Memory system having programmable flow control register
Grant 6,067,598 - Roohparvar , et al. May 23, 2 | 2000-05-23 |
Apparatus and method for selecting data bits read from a multistate memory
Grant 6,052,303 - Chevallier , et al. April 18, 2 | 2000-04-18 |
Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
Grant 6,047,352 - Lakhani , et al. April 4, 2 | 2000-04-04 |
Level detection circuit
Grant 6,046,615 - Chevallier , et al. April 4, 2 | 2000-04-04 |
Integrated circuit charge coupling circuit
Grant 6,040,992 - Chevallier March 21, 2 | 2000-03-21 |
Voltage pump switch
Grant 6,023,427 - Lakhani , et al. February 8, 2 | 2000-02-08 |
Memory system having flexible bus structure and method
Grant 6,021,459 - Norman , et al. February 1, 2 | 2000-02-01 |
Adjustable timer circuit
Grant 6,020,775 - Chevallier February 1, 2 | 2000-02-01 |
Integrated circuit with temperature detector
Grant 6,002,627 - Chevallier December 14, 1 | 1999-12-14 |
Method and apparatus for limiting bitline current
Grant 5,995,423 - Lakhani , et al. November 30, 1 | 1999-11-30 |
Flash memory system having fast erase operation
Grant 5,917,755 - Rinerson , et al. June 29, 1 | 1999-06-29 |
Apparatus for reading state of multistate non-volatile memory cells
Grant 5,912,838 - Chevallier June 15, 1 | 1999-06-15 |
Op amp circuit with variable resistance and memory system including same
Grant 5,903,504 - Chevallier , et al. May 11, 1 | 1999-05-11 |
Integrated circuit with supply voltage detector
Grant 5,898,634 - Chevallier April 27, 1 | 1999-04-27 |
System and method for selecting shorted wordlines of an array having dual wordline drivers
Grant 5,898,637 - Lakhani , et al. April 27, 1 | 1999-04-27 |
Architecture for state machine for controlling internal operations of flash memory
Grant 5,890,193 - Chevallier March 30, 1 | 1999-03-30 |
Integrated circuit with temperature detector
Grant 5,875,142 - Chevallier February 23, 1 | 1999-02-23 |
Timer circuit with programmable decode circuitry
Grant 5,841,827 - Chevallier November 24, 1 | 1998-11-24 |
Clocking scheme and charge transfer switch for increasing the efficiency of a charge pump or other circuit
Grant 5,818,289 - Chevallier , et al. October 6, 1 | 1998-10-06 |
Memory system having programmable control parameters
Grant 5,801,985 - Roohparvar , et al. September 1, 1 | 1998-09-01 |
Segmented non-volatile memory array having multiple sources
Grant 5,793,087 - Chevallier August 11, 1 | 1998-08-11 |
Apparatus and method for management of integrated circuit layout verification processes
Grant 5,787,006 - Chevallier , et al. July 28, 1 | 1998-07-28 |
Flash memory system having fast erase operation
Grant 5,781,477 - Rinerson , et al. July 14, 1 | 1998-07-14 |
Apparatus and method for detecting over-programming condition in multistate memory device
Grant 5,771,346 - Norman , et al. June 23, 1 | 1998-06-23 |
Level detection circuit and method
Grant 5,767,711 - Chevallier , et al. June 16, 1 | 1998-06-16 |
Apparatus and method for programming multistate memory device
Grant 5,768,287 - Norman , et al. June 16, 1 | 1998-06-16 |
Method for performing analog over-program and under-program detection for a multistate memory cell
Grant 5,764,568 - Chevallier June 9, 1 | 1998-06-09 |
Non-volatile memory system having automatic cycling test function
Grant 5,751,944 - Roohparvar , et al. May 12, 1 | 1998-05-12 |
OP amp circuit with variable resistance and memory system including same
Grant 5,694,366 - Chevallier , et al. December 2, 1 | 1997-12-02 |
Segmented non-volatile memory array with multiple sources having improved source line decode circuitry
Grant 5,687,117 - Chevallier , et al. November 11, 1 | 1997-11-11 |
Segmented non-volatile memory array with multiple sources with improved word line control circuitry
Grant 5,673,224 - Chevallier , et al. September 30, 1 | 1997-09-30 |
Adjustable timer circuit
Grant 5,629,644 - Chevallier May 13, 1 | 1997-05-13 |
Memory system having programmable flow control register
Grant 5,619,453 - Roohparvar , et al. April 8, 1 | 1997-04-08 |
Power level detection circuit
Grant 5,581,206 - Chevallier , et al. December 3, 1 | 1996-12-03 |
Memory circuit with pumped voltage for erase and program operations
Grant 5,313,429 - Chevallier , et al. May 17, 1 | 1994-05-17 |
Charge pump with high output current
Grant 5,216,588 - Bajwa , et al. June 1, 1 | 1993-06-01 |
Memory array architecture for flash memory
Grant 5,185,718 - Rinerson , et al. February 9, 1 | 1993-02-09 |
| 