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Multi-layer integrated circuit with enhanced thermal dissipation using back-end metal layers
Grant 11,367,830 - Chetlur , et al. June 21, 2 | 2022-06-21 |
Method and apparatus for eliminating bit disturbance errors in non-volatile memory devices
Grant 11,327,882 - Sarwar , et al. May 10, 2 | 2022-05-10 |
Systems and Methods for Integrated Shielding in a Current Sensor
App 20220137097 - Milano; Shaun D. ; et al. | 2022-05-05 |
Dual Circuit Digital Isolator
App 20220115316 - Chetlur; Sundar ; et al. | 2022-04-14 |
Methods and apparatus for electrical overstress protection
Grant 11,303,116 - Lamar , et al. April 12, 2 | 2022-04-12 |
Multi-layer Integrated Circuit With Enhanced Thermal Dissipation Using Back-end Metal Layers
App 20220077382 - Chetlur; Sundar ; et al. | 2022-03-10 |
Systems and methods for integrated shielding in a current sensor
Grant 11,262,385 - Milano , et al. March 1, 2 | 2022-03-01 |
Electrostatic discharge protection
Grant 11,195,826 - Klebanov , et al. December 7, 2 | 2021-12-07 |
Method and apparatus for eliminating EEPROM bit-disturb
Grant 11,170,858 - Sarwar , et al. November 9, 2 | 2021-11-09 |
Method And Apparatus For Eliminating Eeprom Bit-disturb
App 20210295932 - Sarwar; Muhammad ; et al. | 2021-09-23 |
Electrostatic Discharge Protection
App 20210242193 - Klebanov; Maxim ; et al. | 2021-08-05 |
Method And Apparatus For Eliminating Bit Disturbance Errors In Non-volatile Memory Devices
App 20210240606 - Sarwar; Muhammed ; et al. | 2021-08-05 |
Magnetoresistance structure including two hard masks
Grant 11,005,036 - Liu , et al. May 11, 2 | 2021-05-11 |
Metal-oxide semiconductor (MOS) device structure based on a poly-filled trench isolation region
Grant 10,943,976 - Chetlur , et al. March 9, 2 | 2021-03-09 |
Electronic Circuit Structure And Method Of Fabricating Electronic Circuit Structure Having Magnetoresistance Element With Improved Electrical Contacts
App 20210057642 - Liu; Yen Ting ; et al. | 2021-02-25 |
Method of multiple gate oxide forming with hard mask
Grant 10,916,438 - Klebanov , et al. February 9, 2 | 2021-02-09 |
Electronic circuit structure and method of fabricating electronic circuit structure having magnetoresistance element with improved electrical contacts
Grant 10,868,240 - Liu , et al. December 15, 2 | 2020-12-15 |
Method Of Multiple Gate Oxide Forming With Hard Mask
App 20200357652 - Klebanov; Maxim ; et al. | 2020-11-12 |
Electronic Circuit Structure and Method of Fabricating Electronic Circuit Structure Having Magnetoresistance Element with Improv
App 20200266337 - Liu; Yen Ting ; et al. | 2020-08-20 |
Magnetoresistance Structure Including Two Hard Masks
App 20200136032 - Liu; Yen Ting ; et al. | 2020-04-30 |
Signal isolator having interposer
Grant 10,622,549 - Chetlur , et al. | 2020-04-14 |
Patterning Of A Magnetoresistance Structure Including Two Hard Masks
App 20200075846 - Liu; Yen Ting ; et al. | 2020-03-05 |
Methods And Apparatus For Electrical Overstress Protection
App 20200076189 - Lamar; Washington ; et al. | 2020-03-05 |
Patterning of a magnetoresistance structure including two hard masks
Grant 10,566,526 - Liu , et al. Feb | 2020-02-18 |
Metal-oxide Semiconductor (mos) Device Structure Based On A Poly-filled Trench Isolation Region
App 20190363162 - Chetlur; Sundar ; et al. | 2019-11-28 |
Metal-oxide semiconductor (MOS) device structure based on a poly-filled trench isolation region
Grant 10,468,485 - Chetlur , et al. No | 2019-11-05 |
Systems and Methods for Integrated Shielding in a Current Sensor
App 20190285667 - Milano; Shaun D. ; et al. | 2019-09-19 |
Systems and methods for integrated shielding in a current sensor
Grant 10,352,969 - Milano , et al. July 16, 2 | 2019-07-16 |
Signal Isolator Having Interposer
App 20190067562 - Chetlur; Sundar ; et al. | 2019-02-28 |
Metal-oxide Semiconductor (mos) Device Structure Based On A Poly-filled Trench Isolation Region
App 20180342500 - Chetlur; Sundar ; et al. | 2018-11-29 |
Systems and Methods for Integrated Shielding in a Current Sensor
App 20180149677 - Milano; Shaun D. ; et al. | 2018-05-31 |
Method of forming a backside contact structure having selective side-wall isolation
Grant 9,230,861 - Chetlur , et al. January 5, 2 | 2016-01-05 |
Method Of Forming A Backside Contact Structure Having Selective Side-wall Isolation
App 20140099772 - Chetlur; Sundar ; et al. | 2014-04-10 |
Non-contact method for determining quality of semiconductor dielectrics
Grant 6,664,800 - Chacon , et al. December 16, 2 | 2003-12-16 |
Method of creating hydrogen isotope reservoirs in a semiconductor device
Grant 6,605,529 - Chetlur , et al. August 12, 2 | 2003-08-12 |
Non-contact method for determining soft breakdown in dielectrics
App 20020121914 - Chacon, Carlos M. ; et al. | 2002-09-05 |
Method for determining the hot carrier lifetime of a transistor
Grant 6,198,301 - Chetlur , et al. March 6, 2 | 2001-03-06 |
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