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name:-0.0087981224060059
name:-0.0032649040222168
name:-0.00049400329589844
Cheng; Ya-Lun Patent Filings

Cheng; Ya-Lun

Patent Applications and Registrations

Patent applications and USPTO patent grants for Cheng; Ya-Lun.The latest application filed is for "method for fabricating metal-oxide-semiconductor transistor with selective epitaxial growth film".

Company Profile
0.3.6
  • Cheng; Ya-Lun - Taipei TW
  • Cheng; Ya-Lun - Taipei City TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method of cleaning a semiconductor substrate
Grant 7,306,681 - Cheng , et al. December 11, 2
2007-12-11
Method of forming a transistor using selective epitaxial growth
Grant 7,037,793 - Chien , et al. May 2, 2
2006-05-02
Method For Fabricating Metal-oxide-semiconductor Transistor With Selective Epitaxial Growth Film
App 20060024896 - Huang; Kuo-Tai ;   et al.
2006-02-02
Method for preventing to form a spacer undercut in SEG pre-clean process
Grant 6,991,991 - Cheng , et al. January 31, 2
2006-01-31
Method of cleaning a semiconductor substrate and cleaning recipes
App 20050252525 - Cheng, Ya-Lun ;   et al.
2005-11-17
Method Of Forming A Transistor Using Selective Epitaxial Growth
App 20050176205 - Chien, Chin-Cheng ;   et al.
2005-08-11
Method of surface pretreatment before selective epitaxial growth
App 20050130434 - Chien, Chin-Cheng ;   et al.
2005-06-16
Method For Preventing To Form A Spacer Undercut In Seg Pre-clean Process
App 20050101093 - Cheng, Ya-Lun ;   et al.
2005-05-12
Metal-oxide-semiconductor transistor with selective epitaxial growth film
App 20040256671 - Huang, Kuo-Tai ;   et al.
2004-12-23

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