Cheng; Kwang Ting

Patent Applications and Registrations

Patent applications and USPTO patent grants for Cheng; Kwang Ting.The latest application filed is for "hybrid memristor/field-effect transistor memory cell and its information encoding scheme".

Company Profile

1.9.4

Cheng; Kwang Ting - Hong Kong CN
Cheng; Kwang-Ting - Santa Barbara CA
Cheng; Kwang-Ting - North Plainfield NJ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Hybrid memristor/field-effect transistor memory cell and its information encoding scheme Grant 11,444,124 - Cheng , et al. September 13, 2	2022-09-13
Hybrid Memristor/field-effect Transistor Memory Cell And Its Information Encoding Scheme App 20200161373 - CHENG; Kwang Ting ; et al.	2020-05-21
Maximizing expected generalization for learning complex query concepts Grant 7,158,970 - Chang , et al. January 2, 2	2007-01-02
Maximizing expected generalization for learning complex query concepts Grant 6,976,016 - Chang , et al. December 13, 2	2005-12-13
Method and system for improving the test quality for scan-based BIST using a general test application scheme Grant 6,694,466 - Tsai , et al. February 17, 2	2004-02-17
Maximizing expected generalization for learning complex query concepts App 20030065661 - Chang, Edward Y. ; et al.	2003-04-03
Maximizing expected generalization for learning complex query concepts App 20030050923 - Chang, Edward Y. ; et al.	2003-03-13
Computer user interface for perception-based information retrieval App 20030016250 - Chang, Edward Y. ; et al.	2003-01-23
Almost full-scan BIST method and system having higher fault coverage and shorter test application time Grant 6,463,561 - Bhawmik , et al. October 8, 2	2002-10-08
System and method for testing high speed VLSI devices using slower testers Grant 6,345,373 - Chakradhar , et al. February 5, 2	2002-02-05
Hybrid algorithm for test point selection for scan-based BIST Grant 6,256,759 - Bhawmik , et al. July 3, 2	2001-07-03
Method for inserting test points for full-and-partial-scan built-in self-testing Grant 5,828,828 - Lin , et al. October 27, 1	1998-10-27
Method and integrated circuit adapted for partial scan testability Grant 5,043,986 - Agrawal , et al. August 27, 1	1991-08-27

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