| Patent | Date |
|---|
E-fuse structure design in electrical programmable redundancy for embedded memory circuit
Grant 9,099,467 - Thei , et al. August 4, 2 | 2015-08-04 |
Layout methods of integrated circuits having unit MOS devices
Grant 8,803,202 - Chuang , et al. August 12, 2 | 2014-08-12 |
A New E-fuse Structure Design in Electrical Programmable Redundancy for Embedded Memory Circuit
App 20140218100 - Thei; Kong-Beng ; et al. | 2014-08-07 |
Semiconductor device and method of fabricating same
Grant 8,716,103 - Cheng , et al. May 6, 2 | 2014-05-06 |
E-fuse structure design in electrical programmable redundancy for embedded memory circuit
Grant 8,629,050 - Thei , et al. January 14, 2 | 2014-01-14 |
Semiconductor Device and Method of Fabricating Same
App 20130316504 - Cheng; Chung Long ; et al. | 2013-11-28 |
Semiconductor device and method of fabricating same
Grant 8,461,629 - Cheng , et al. June 11, 2 | 2013-06-11 |
Hybrid shallow trench isolation for high-k metal gate device improvement
Grant 8,367,515 - Cheng , et al. February 5, 2 | 2013-02-05 |
Layout Methods of Integrated Circuits Having Unit MOS Devices
App 20120286368 - Chuang; Harry ; et al. | 2012-11-15 |
3-dimensional device design layout
Grant 8,286,114 - Chuang , et al. October 9, 2 | 2012-10-09 |
Layout methods of integrated circuits having unit MOS devices
Grant 8,237,201 - Chuang , et al. August 7, 2 | 2012-08-07 |
E-fuse Structure Design in Electrical Programmable Redundancy for Embedded Memory Circuit
App 20120196434 - Thei; Kong-Beng ; et al. | 2012-08-02 |
Fuse structure
Grant 8,174,091 - Thei , et al. May 8, 2 | 2012-05-08 |
Downsize polysilicon height for polysilicon resistor integration of replacement gate process
Grant 8,153,498 - Hsu , et al. April 10, 2 | 2012-04-10 |
Semiconductor Device and Method of Fabricating Same
App 20110260251 - Cheng; Chung Long ; et al. | 2011-10-27 |
Semiconductor device with both I/O and core components and method of fabricating same
Grant 7,998,830 - Cheng , et al. August 16, 2 | 2011-08-16 |
Semiconductor Device with both I/O and Core Components and Method of Fabricating Same
App 20110076813 - Cheng; Chung Long ; et al. | 2011-03-31 |
Contact scheme for MOSFETs
Grant 7,898,037 - Chuang , et al. March 1, 2 | 2011-03-01 |
Semiconductor device with both I/O and core components and method of fabricating same
Grant 7,868,361 - Cheng , et al. January 11, 2 | 2011-01-11 |
Method and apparatus for semiconductor device with improved source/drain junctions
Grant 7,868,386 - Thei , et al. January 11, 2 | 2011-01-11 |
SOI devices
Grant 7,812,379 - Cheng , et al. October 12, 2 | 2010-10-12 |
Methods for fabricating SOI devices
Grant 7,803,674 - Cheng , et al. September 28, 2 | 2010-09-28 |
FIN-FET device structure
Grant 7,768,069 - Cheng , et al. August 3, 2 | 2010-08-03 |
Hybrid Shallow Trench Isolation For High-k Metal Gate Device Improvement
App 20100087043 - CHENG; Chung Long ; et al. | 2010-04-08 |
Raise S/d For Gate-last Ild0 Gap Filling
App 20100078728 - Li; Hou-Ju ; et al. | 2010-04-01 |
Selective formation of stress memorization layer
Grant 7,678,636 - Chuang , et al. March 16, 2 | 2010-03-16 |
Downsize Polysilicon Height For Polysilicon Resistor Integration Of Replacement Gate Process
App 20100052058 - Hsu; Chen-Pin ; et al. | 2010-03-04 |
Method for semiconductor device performance enhancement
Grant 7,632,729 - Chuang , et al. December 15, 2 | 2009-12-15 |
Soi Devices And Methods For Fabricating The Same
App 20090298243 - Cheng; Chung-Long ; et al. | 2009-12-03 |
Fuse Structure
App 20090273055 - Thei; Kong-Beng ; et al. | 2009-11-05 |
Soi Devices And Methods For Fabricating The Same
App 20090218623 - Cheng; Chung-Long ; et al. | 2009-09-03 |
SOI devices and methods for fabricating the same
Grant 7,550,795 - Cheng , et al. June 23, 2 | 2009-06-23 |
Controllable varactor within dummy substrate pattern
Grant 7,525,177 - Cheng , et al. April 28, 2 | 2009-04-28 |
Semiconductor Device with both I/O and Core Components and Method of Fabricating Same
App 20080315320 - Cheng; Chung Long ; et al. | 2008-12-25 |
Layout methods of integrated circuits having unit MOS devices
App 20080296691 - Chuang; Harry ; et al. | 2008-12-04 |
Contact Scheme for MOSFETs
App 20080258228 - Chuang; Harry ; et al. | 2008-10-23 |
3-Dimensional Device Design Layout
App 20080263492 - Chuang; Harry ; et al. | 2008-10-23 |
Method and Apparatus for Semiconductor Device with Improved Source/Drain Junctions
App 20080179688 - Thei; Kong Beng ; et al. | 2008-07-31 |
Method and apparatus for semiconductor device with improved source/drain junctions
Grant 7,364,957 - Thei , et al. April 29, 2 | 2008-04-29 |
Method for semiconductor device performance enhancement
App 20080076215 - Chuang; Harry ; et al. | 2008-03-27 |
Damascene gate structure with a resistive device
Grant 7,332,756 - Cheng , et al. February 19, 2 | 2008-02-19 |
Method and apparatus for semiconductor device with improved source/drain junctions
App 20080020533 - Thei; Kong-Beng ; et al. | 2008-01-24 |
SOI devices and methods for fabricating the same
App 20080001188 - Cheng; Chung-Long ; et al. | 2008-01-03 |
Selective formation of stress memorization layer
App 20080003734 - Chuang; Harry ; et al. | 2008-01-03 |
Semiconductor device with recessed L-shaped spacer and method of fabricating the same
Grant 7,298,011 - Thei , et al. November 20, 2 | 2007-11-20 |
Method for integrally forming a damascene gate structure and a resistive device
App 20070114579 - Cheng; Chung Long ; et al. | 2007-05-24 |
Ozone vapor clean method
Grant 7,157,351 - Cheng , et al. January 2, 2 | 2007-01-02 |
Controllable varactor within dummy substrate pattern
App 20060220181 - Cheng; Chung-Long ; et al. | 2006-10-05 |
Fuse structure and method for making the same
App 20060163734 - Thei; Kong-Beng ; et al. | 2006-07-27 |
Planarizing method for forming FIN-FET device
App 20060115947 - Cheng; Chung-Long ; et al. | 2006-06-01 |
Planarizing method for forming FIN-FET device
Grant 7,026,195 - Cheng , et al. April 11, 2 | 2006-04-11 |
New fuse structure
App 20050285222 - Thei, Kong-Beng ; et al. | 2005-12-29 |
Ozone vapor clean method
App 20050260827 - Cheng, Chung-Long ; et al. | 2005-11-24 |
Planarizing method for forming FIN-FET device
App 20050258476 - Cheng, Chung-Long ; et al. | 2005-11-24 |
Novel multi-gate formation procedure for gate oxide quality improvement
App 20050124160 - Chiu, Yi Song ; et al. | 2005-06-09 |
| 