CHENG; Chia-Lin

Patent Applications and Registrations

Patent applications and USPTO patent grants for CHENG; Chia-Lin.The latest application filed is for "system and method for detecting hardware trojan circuits".

Company Profile

1.10.10

CHENG; Chia-Lin - Atlanta GA
Cheng; Chia-Lin - Tao-Yuan TW
Cheng; Chia-Lin - Lung-Tan TW
Cheng, Chia-Lin - Lung-Tan Shiang TW
Cheng; Chia-Lin - Taoyuen TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
System And Method For Detecting Hardware Trojan Circuits App 20210342443 - PRVULOVIC; Milos ; et al.	2021-11-04
Antenna-less RFID tag Grant 11,126,905 - Zajic , et al. September 21, 2	2021-09-21
Antenna-less Rfid Tag App 20200160133 - Zajic; Alenka ; et al.	2020-05-21
De-coupling capacitors produced by utilizing dummy conductive structures integrated circuits Grant 7,994,606 - Hou , et al. August 9, 2	2011-08-09
De-coupling Capacitors Produced By Utilizing Dummy Conductive Structures Integrated Circuits App 20090180237 - Hou; Cliff ; et al.	2009-07-16
De-coupling capacitors produced by utilizing dummy conductive structures integrated circuits Grant 7,262,951 - Hou , et al. August 28, 2	2007-08-28
Method for integrally checking chip and package substrate layouts for errors Grant 7,257,784 - Cheng , et al. August 14, 2	2007-08-14
Very fine-grain voltage island integrated circuit Grant 7,247,894 - Hou , et al. July 24, 2	2007-07-24
De-coupling capacitors produced by utilizing dummy conductive structures integrated circuits App 20070108554 - Hou; Cliff ; et al.	2007-05-17
Method for integrally checking chip and package substrate layouts for errors App 20060217916 - Cheng; Chia-Lin ; et al.	2006-09-28
Integrated circuit design for routing an electrical connection Grant 7,091,614 - Cheng , et al. August 15, 2	2006-08-15
Integrated circuit design for routing an electrical connection App 20060097395 - Cheng; Chia-Lin ; et al.	2006-05-11
De-coupling capacitors produced by utilizing dummy conductive structures integrated circuits App 20060067032 - Hou; Cliff ; et al.	2006-03-30
Methodology to optimize hierarchical clock skew by clock delay compensation Grant 7,017,132 - Hou , et al. March 21, 2	2006-03-21
Very fine-grain voltage island integrated circuit App 20050242375 - Hou, Cliff ; et al.	2005-11-03
Methodology to optimize hierarchical clock skew by clock delay compensation App 20050102643 - Hou, Cliff ; et al.	2005-05-12
Flexible routing channels among vias Grant 6,797,999 - Hou , et al. September 28, 2	2004-09-28
Method and apparatus to perform resistance and capacitance (RC) parameter customization for better timing closure results in physical synthesis and optimization Grant 6,789,248 - Lu , et al. September 7, 2	2004-09-07
Flexible routing channels among vias App 20030227084 - Hou, Cliff ; et al.	2003-12-11
Supply independent constant output circuit having fast stabilization Grant 5,247,209 - Cheng September 21, 1	1993-09-21

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