loadpatents
name:-0.2632257938385
name:-0.20581793785095
name:-0.090487957000732
CHEN; Yen-Huei Patent Filings

CHEN; Yen-Huei

Patent Applications and Registrations

Patent applications and USPTO patent grants for CHEN; Yen-Huei.The latest application filed is for "memory macro including through-silicon via".

Company Profile
96.200.200
  • CHEN; Yen-Huei - Hsinchu TW
  • Chen; Yen-Huei - Jhudong Township TW
  • Chen; Yen-Huei - Hsinchu County TW
  • CHEN; Yen-Huei - Hsinchu County 31055 TW
  • CHEN; Yen-Huei - Zhudong Township TW
  • Chen; Yen-Huei - Jhudonog Township TW
  • Chen; Yen-Huei - Jhudong TW
  • CHEN; Yen-Huei - Hsinchu City TW
  • Chen; Yen-Huei - Jhudong Township, Hsinchu County N/A TW
  • - Jhudong Township TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Memory Macro Including Through-silicon Via
App 20220293492 - FUJIWARA; Hidehiro ;   et al.
2022-09-15
Integrated Circuit Read Only Memory (rom) Structure
App 20220285375 - LIN; Geng-Cing ;   et al.
2022-09-08
Static random access memory with write assist circuit
Grant 11,423,977 - Fujiwara , et al. August 23, 2
2022-08-23
Method of forming semiconductor device including distributed write driving arrangement
Grant 11,423,974 - Fujiwara , et al. August 23, 2
2022-08-23
Write assist for a memory device and methods of forming the same
Grant 11,423,978 - Singh , et al. August 23, 2
2022-08-23
Memory with write assist scheme
Grant 11,404,115 - Fujiwara , et al. August 2, 2
2022-08-02
Memory device including a word line with portions with different sizes in different metal layers
Grant 11,404,113 - Nien , et al. August 2, 2
2022-08-02
Low voltage memory device
Grant 11,404,114 - Sinangil , et al. August 2, 2
2022-08-02
Configurable Memory Storage System
App 20220236894 - HSU; Yu-Hao ;   et al.
2022-07-28
Memory computation circuit and method
Grant 11,398,275 - Chen , et al. July 26, 2
2022-07-26
Header layout design including backside power rail
Grant 11,398,257 - Mori , et al. July 26, 2
2022-07-26
Systems and Methods for Memory Operation Using Local Word Lines
App 20220172758 - Nien; Yi-Hsin ;   et al.
2022-06-02
Memory With Write Assist Scheme
App 20220139450 - Fujiwara; Hidehiro ;   et al.
2022-05-05
Multi word line assertion
Grant 11,322,198 - Fujiwara , et al. May 3, 2
2022-05-03
Boost bypass circuitry in a memory storage device
Grant 11,308,999 - Fujiwara , et al. April 19, 2
2022-04-19
Configurable memory storage system
Grant 11,301,148 - Hsu , et al. April 12, 2
2022-04-12
Static Random Access Memory And Method Of Controlling The Same
App 20220093172 - LIN; Chih-Yu ;   et al.
2022-03-24
Voltage Regulator With Power Rail Tracking
App 20220083089 - Mori; Haruki ;   et al.
2022-03-17
Bitcell Supporting Bit-write-mask Function
App 20220084585 - Fujiwara; Hidehiro ;   et al.
2022-03-17
Electronic device for checking randomness of identification key device, random key checker circuit, and method of checking randomness of electronic device
Grant 11,263,331 - Lin , et al. March 1, 2
2022-03-01
Systems and methods for memory operation using local word lines
Grant 11,264,070 - Nien , et al. March 1, 2
2022-03-01
Semiconductor memory with respective power voltages for memory cells
Grant 11,264,088 - Wu , et al. March 1, 2
2022-03-01
Sense amplifier layout for FinFET technology
Grant 11,238,905 - Chen , et al. February 1, 2
2022-02-01
In-memory Computation Circuit And Method
App 20220019407 - CHIH; Yu-Der ;   et al.
2022-01-20
Four Cpp Wide Memory Cell With Buried Power Grid, And Method Of Fabricating Same
App 20210408011 - FUJIWARA; Hidehiro ;   et al.
2021-12-30
Memory Device
App 20210398589 - NIEN; Yi-Hsin ;   et al.
2021-12-23
Static random access memory with a supplementary driver circuit and method of controlling the same
Grant 11,205,475 - Lin , et al. December 21, 2
2021-12-21
Voltage regulator with power rail tracking
Grant 11,199,866 - Mori , et al. December 14, 2
2021-12-14
Low voltage bit-cell
Grant 11,200,946 - Sinangil , et al. December 14, 2
2021-12-14
Multi-Stage Bit Line Pre-Charge
App 20210383847 - Wu; Wei-Cheng ;   et al.
2021-12-09
4cpp Sram Cell And Array
App 20210366915 - Fujiwara; Hidehiro ;   et al.
2021-11-25
Bitcell supporting bit-write-mask function
Grant 11,183,234 - Fujiwara , et al. November 23, 2
2021-11-23
Memory cell
Grant 11,176,997 - Fujiwara , et al. November 16, 2
2021-11-16
Method And System To Balance Ground Bounce
App 20210350849 - Fujiwara; Hidehiro ;   et al.
2021-11-11
Memory Device
App 20210350847 - Fujiwara; Hidehiro ;   et al.
2021-11-11
Semiconductor Chip Having Memory And Logic Cells
App 20210343317 - Fujiwara; Hidehiro ;   et al.
2021-11-04
SRAM memory
Grant 11,152,057 - Fujiwara , et al. October 19, 2
2021-10-19
Memory cell having multi-level word line
Grant 11,152,301 - Fujiwara , et al. October 19, 2
2021-10-19
Method for Eliminating False Paths of a Circuit Unit To Be Implemented Using a System
App 20210319160 - Dai; Chun-Jiun ;   et al.
2021-10-14
Memory device with reduced-resistance interconnect
Grant 11,145,655 - Singh , et al. October 12, 2
2021-10-12
SRAM Circuits with Aligned Gate Electrodes
App 20210305260 - Chen; Fang ;   et al.
2021-09-30
Memory Macro And Method Of Operating The Same
App 20210287726 - SU; Chien-Kuo ;   et al.
2021-09-16
Static Random Access Memory
App 20210287740 - Wu; Wei-Cheng ;   et al.
2021-09-16
Method Of Forming Semiconductor Device Including Distributed Write Driving Arrangement
App 20210280437 - FUJIWARA; Hidehiro ;   et al.
2021-09-09
Memory Array Circuit And Method Of Manufacturing Same
App 20210272967 - FUJIWARA; Hidehiro ;   et al.
2021-09-02
Computing-in-memory Device And Method
App 20210263672 - Chang; Jonathan Tsung-Yung ;   et al.
2021-08-26
Sram Cell Word Line Structure With Reduced Rc Effects
App 20210265363 - FUJIWARA; Hidehiro ;   et al.
2021-08-26
Multi-stage bit line pre-charge
Grant 11,100,964 - Wu , et al. August 24, 2
2021-08-24
Floating Data Line Circuit And Method
App 20210257029 - ARORA; Manish ;   et al.
2021-08-19
Multi-Stage Bit Line Pre-Charge
App 20210249057 - Wu; Wei-Cheng ;   et al.
2021-08-12
4Cpp SRAM cell and array
Grant 11,088,151 - Fujiwara , et al. August 10, 2
2021-08-10
Shared Power Footer Circuit
App 20210241824 - Fujiwara; Hidehiro ;   et al.
2021-08-05
Voltage Regulator With Power Rail Tracking
App 20210232168 - Mori; Haruki ;   et al.
2021-07-29
Method and system to balance ground bounce
Grant 11,074,966 - Fujiwara , et al. July 27, 2
2021-07-27
Systems and Methods for Memory Operation Using Local Word Lines
App 20210225420 - Nien; Yi-Hsin ;   et al.
2021-07-22
Memory Device With Strap Cells
App 20210217446 - CHANG; Jonathan Tsung-Yung ;   et al.
2021-07-15
Memory Array Circuit And Method Of Manufacturing Same
App 20210217742 - FUJIWARA; Hidehiro ;   et al.
2021-07-15
Semiconductor chip having memory and logic cells
Grant 11,062,739 - Fujiwara , et al. July 13, 2
2021-07-13
Header Layout Design Including Backside Power Rail
App 20210201961 - MORI; Haruki ;   et al.
2021-07-01
Memory Cell
App 20210201999 - Fujiwara; Hidehiro ;   et al.
2021-07-01
Memory Device
App 20210201990 - Nien; Yi-Hsin ;   et al.
2021-07-01
Write Assist for a Memory Device and Methods of Forming the Same
App 20210201991 - Singh; Sahil Preet ;   et al.
2021-07-01
Configurable Memory Storage System
App 20210200452 - HSU; Yu-Hao ;   et al.
2021-07-01
Method for eliminating false paths of a circuit unit to be implemented using a system
Grant 11,048,840 - Dai , et al. June 29, 2
2021-06-29
Static random access memory method
Grant 11,043,264 - Wu , et al. June 22, 2
2021-06-22
Boost Bypass Circuitry In A Memory Storage Device
App 20210183418 - FUJIWARA; Hidehiro ;   et al.
2021-06-17
Testing circuit, testing method, and apparatus for testing multi-port random access memory
Grant 11,037,644 - Fujiwara , et al. June 15, 2
2021-06-15
SRAM circuits with aligned gate electrodes
Grant 11,037,934 - Chen , et al. June 15, 2
2021-06-15
Memory macro and method of operating the same
Grant 11,031,055 - Su , et al. June 8, 2
2021-06-08
SRAM cell word line structure with reduced RC effects
Grant 11,024,633 - Fujiwara , et al. June 1, 2
2021-06-01
Bitcell Supporting Bit-write-mask Function
App 20210158864 - Fujiwara; Hidehiro ;   et al.
2021-05-27
Memory cell and method of manufacturing the same
Grant 11,018,142 - Fujiwara , et al. May 25, 2
2021-05-25
Floating data line circuits and methods
Grant 11,011,238 - Arora , et al. May 18, 2
2021-05-18
Memory Device And Method Of Controlling Memory Device
App 20210125665 - FUJIWARA; HIDEHIRO ;   et al.
2021-04-29
Flying and twisted bit line architecture for dual-port static random-access memory (DP SRAM)
Grant 10,991,423 - Singh , et al. April 27, 2
2021-04-27
Semiconductor device including distributed write driving arrangement and method of operating same
Grant 10,991,420 - Fujiwara , et al. April 27, 2
2021-04-27
Integrated circuit and operating method thereof
Grant 10,978,144 - Huang , et al. April 13, 2
2021-04-13
Write assist for a memory device and methods of forming the same
Grant 10,971,220 - Singh , et al. April 6, 2
2021-04-06
SRAM cell for interleaved wordline scheme
Grant 10,971,217 - Fujiwara , et al. April 6, 2
2021-04-06
Multi Word Line Assertion
App 20210098054 - Fujiwara; Hidehiro ;   et al.
2021-04-01
4cpp Sram Cell And Array
App 20210098467 - Fujiwara; Hidehiro ;   et al.
2021-04-01
Memory cell
Grant 10,964,389 - Fujiwara , et al. March 30, 2
2021-03-30
Memory array circuit and method of manufacturing the same
Grant 10,964,683 - Fujiwara , et al. March 30, 2
2021-03-30
Memory device with strap cells
Grant 10,964,355 - Chang , et al. March 30, 2
2021-03-30
Integrated Circuit And Operating Method Thereof
App 20210082495 - Huang; Chia-En ;   et al.
2021-03-18
Configurable memory storage system
Grant 10,949,100 - Hsu , et al. March 16, 2
2021-03-16
Memory device
Grant 10,943,667 - Fujiwara , et al. March 9, 2
2021-03-09
Low Voltage Bit-Cell
App 20210050053 - Sinangil; Mahmut ;   et al.
2021-02-18
Memory Computation Circuit And Method
App 20210043253 - CHEN; Yen-Huei ;   et al.
2021-02-11
Low Voltage Memory Device
App 20210043252 - Sinangil; Mahmut ;   et al.
2021-02-11
Multi word line assertion
Grant 10,892,008 - Fujiwara , et al. January 12, 2
2021-01-12
Memory device and method of controlling memory device
Grant 10,885,973 - Fujiwara , et al. January 5, 2
2021-01-05
Semiconductor Chip
App 20200411063 - Fujiwara; Hidehiro ;   et al.
2020-12-31
Static Random Access Memory with Write Assist Circuit
App 20200411084 - FUJIWARA; Hidehiro ;   et al.
2020-12-31
Memory device having low bitline voltage swing in read port and method for reading memory cell
Grant 10,878,894 - Fujiwara , et al. December 29, 2
2020-12-29
Sram Based Authentication Circuit
App 20200402573 - LIN; Chien-Chen ;   et al.
2020-12-24
Boost bypass circuitry in a memory storage device
Grant 10,872,644 - Fujiwara , et al. December 22, 2
2020-12-22
Semiconductor Memory With Respective Power Voltages For Memory Cells
App 20200381043 - WU; Wei-Cheng ;   et al.
2020-12-03
Memory read stability enhancement with short segmented bit line architecture
Grant 10,854,282 - Sinangil , et al. December 1, 2
2020-12-01
Semiconductor Device Including Distributed Write Driving Arrangement And Method Of Operating Same
App 20200372950 - FUJIWARA; Hidehiro ;   et al.
2020-11-26
Sram Cell For Interleaved Wordline Scheme
App 20200372951 - Fujiwara; Hidehiro ;   et al.
2020-11-26
Low voltage bit-cell
Grant 10,847,214 - Sinangil , et al. November 24, 2
2020-11-24
Memory computation circuit and method
Grant 10,839,894 - Chen , et al. November 17, 2
2020-11-17
Variation tolerant read assist circuit for SRAM
Grant 10,832,765 - Fujiwara , et al. November 10, 2
2020-11-10
Low voltage memory device
Grant 10,803,928 - Sinangil , et al. October 13, 2
2020-10-13
Memory Cell
App 20200321054 - Fujiwara; Hidehiro ;   et al.
2020-10-08
Flying and twisted bit line architecture for dual-port static random-access memory (DP SRAM)
Grant 10,790,015 - Singh , et al. September 29, 2
2020-09-29
Memory circuit having shared word line
Grant 10,783,955 - Fujiwara , et al. Sept
2020-09-22
Semiconductor memory with respective power voltages for memory cells
Grant 10,783,954 - Wu , et al. Sept
2020-09-22
Static Random Access Memory Method
App 20200286550 - WU; Wei-Cheng ;   et al.
2020-09-10
SRAM cell for interleaved wordline scheme
Grant 10,770,131 - Fujiwara , et al. Sep
2020-09-08
SRAM based authentication circuit
Grant 10,770,134 - Lin , et al. Sep
2020-09-08
Static Random Access Memory And Method Of Controlling The Same
App 20200273519 - LIN; Chih-Yu ;   et al.
2020-08-27
Semiconductor device including distributed write driving arrangement and method of operating same
Grant 10,755,768 - Fujiwara , et al. A
2020-08-25
Static random access memory with write assist circuit
Grant 10,734,066 - Fujiwara , et al.
2020-08-04
Sense Amplifier Layout For Finfet Technology
App 20200227095 - CHEN; Yen-Huei ;   et al.
2020-07-16
Memory cell
Grant 10,714,181 - Fujiwara , et al.
2020-07-14
Static random access memory circuit
Grant 10,685,704 - Wu , et al.
2020-06-16
Memory Macro And Method Of Operating The Same
App 20200176037 - SU; Chien-Kuo ;   et al.
2020-06-04
Memory circuit having resistive device coupled with supply voltage line
Grant 10,672,776 - Chen , et al.
2020-06-02
Memory Device With Strap Cells
App 20200152242 - CHANG; Jonathan Tsung-Yung ;   et al.
2020-05-14
Static random access memory with a supplementary driver circuit and method of controlling the same
Grant 10,650,882 - Lin , et al.
2020-05-12
Apparatus and method of three dimensional conductive lines
Grant 10,651,114 - Lin , et al.
2020-05-12
Write Assist for a Memory Device and Methods of Forming the Same
App 20200143875 - Singh; Sahil Preet ;   et al.
2020-05-07
Memory Device With Reduced-resistance Interconnect
App 20200144268 - Singh; Sahil Preet ;   et al.
2020-05-07
Method And System To Balance Ground Bounce
App 20200135268 - Fujiwara; Hidehiro ;   et al.
2020-04-30
Memory Device
App 20200135288 - Fujiwara; Hidehiro ;   et al.
2020-04-30
Sense amplifier layout for FinFET technology
Grant 10,636,458 - Chen , et al.
2020-04-28
Electronic Device For Checking Randomness Of Identification Key Device, Random Key Checker Circuit, And Method Of Checking Rando
App 20200104520 - Lin; Chien-Chen ;   et al.
2020-04-02
Testing Circuit, Testing Method, And Apparatus For Testing Multi-port Random Access Memory
App 20200105358 - Fujiwara; Hidehiro ;   et al.
2020-04-02
Configurable Memory Storage System
App 20200081636 - HSU; Yu-Hao ;   et al.
2020-03-12
Memory Read Stability Enhancement With Short Segmented Bit Line Architecture
App 20200075092 - Sinangil; Mahmut ;   et al.
2020-03-05
Memory Device And Method Of Controlling Memory Device
App 20200066332 - FUJIWARA; HIDEHIRO ;   et al.
2020-02-27
Memory Device Having Low Bitline Voltage Swing In Read Port And Method For Reading Memory Cell
App 20200066333 - FUJIWARA; HIDEHIRO ;   et al.
2020-02-27
Memory macro and method of operating the same
Grant 10,559,333 - Su , et al. Feb
2020-02-11
Memory device with strap cells
Grant 10,541,007 - Chang , et al. Ja
2020-01-21
Sram Memory
App 20200020390 - Fujiwara; Hidehiro ;   et al.
2020-01-16
Flying And Twisted Bit Line Architecture For Dual-port Static Random-access Memory (dp Sram)
App 20200020392 - Singh; Sahil Preet ;   et al.
2020-01-16
Flying And Twisted Bit Line Architecture For Dual-port Static Random-access Memory (dp Sram)
App 20200020391 - Singh; Sahil Preet ;   et al.
2020-01-16
Boost Bypass Circuitry In A Memory Storage Device
App 20200020371 - FUJIWARA; Hidehiro ;   et al.
2020-01-16
Semiconductor Device Including Distributed Write Driving Arrangement And Method Of Operating Same
App 20200020383 - FUJIWARA; Hidehiro ;   et al.
2020-01-16
Memory Cell And Method Of Manufacturing The Same
App 20200020699 - FUJIWARA; Hidehiro ;   et al.
2020-01-16
Memory device with reduced-resistance interconnect
Grant 10,535,658 - Singh , et al. Ja
2020-01-14
Write assist for a memory device and methods of forming the same
Grant 10,529,415 - Singh , et al. J
2020-01-07
Memory Computation Circuit And Method
App 20200005859 - CHEN; Yen-Huei ;   et al.
2020-01-02
Variation Tolerant Read Assist Circuit for SRAM
App 20200005858 - FUJIWARA; Hidehiro ;   et al.
2020-01-02
Floating Data Line Circuits And Methods
App 20200005877 - ARORA; Manish ;   et al.
2020-01-02
Sram Cell Word Line Structure With Reduced Rc Effects
App 20190393228 - FUJIWARA; Hidehiro ;   et al.
2019-12-26
Multi Word Line Assertion
App 20190385671 - Fujiwara; Hidehiro ;   et al.
2019-12-19
Low Voltage Memory Device
App 20190385672 - Sinangil; Mahmut ;   et al.
2019-12-19
Memory read stability enhancement with short segmented bit line architecture
Grant 10,510,403 - Sinangil , et al. Dec
2019-12-17
Method of providing layout design of SRAM cell
Grant 10,510,739 - Fujiwara , et al. Dec
2019-12-17
Configurable memory storage system
Grant 10,503,421 - Hsu , et al. Dec
2019-12-10
Flying and twisted bit line architecture for dual-port static random-access memory (DP SRAM)
Grant 10,490,267 - Singh , et al. Nov
2019-11-26
Memory Cell Having Multi-level Word Line
App 20190341346 - FUJIWARA; Hidehiro ;   et al.
2019-11-07
Memory Circuit Having Resistive Device Coupled With Supply Voltage Line
App 20190326302 - Chen; Yen-Huei ;   et al.
2019-10-24
SRAM Circuits with Aligned Gate Electrodes
App 20190312040 - Chen; Fang ;   et al.
2019-10-10
Static random access memory and method of controlling the same
Grant 10,431,295 - Wang , et al. O
2019-10-01
Write Assist for a Memory Device and Methods of Forming the Same
App 20190295632 - Singh; Sahil Preet ;   et al.
2019-09-26
SRAM cell word line structure with reduced RC effects
Grant 10,411,019 - Fujiwara , et al. Sept
2019-09-10
Memory Macro And Method Of Operating The Same
App 20190259432 - SU; Chien-Kuo ;   et al.
2019-08-22
Method of writing to memory circuit using resistive device
Grant 10,373,964 - Chen , et al.
2019-08-06
Sram Cell For Interleaved Wordline Scheme
App 20190237134 - Fujiwara; Hidehiro ;   et al.
2019-08-01
Method for Eliminating False Paths of a Circuit Unit To Be Implemented Using a System
App 20190236241 - Dai; Chun-Jiun ;   et al.
2019-08-01
Memory cell having multi-level word line
Grant 10,354,952 - Fujiwara , et al. July 16, 2
2019-07-16
SRAM circuits with aligned gate electrodes
Grant 10,332,896 - Chen , et al.
2019-06-25
Memory macro and method of operating the same
Grant 10,319,421 - Su , et al.
2019-06-11
Write assist for a memory device and methods of forming the same
Grant 10,319,435 - Singh , et al.
2019-06-11
Memory Device With Strap Cells
App 20190172501 - CHANG; Jonathan Tsung-Yung ;   et al.
2019-06-06
Static Random Access Memory Circuit
App 20190139600 - WU; Wei-Cheng ;   et al.
2019-05-09
Layout design for manufacturing a memory cell
Grant 10,276,579 - Fujiwara , et al.
2019-04-30
SRAM cell for interleaved wordline scheme
Grant 10,276,231 - Fujiwara , et al.
2019-04-30
Method for eliminating false paths of a circuit unit to be implemented using a system
Grant 10,275,561 - Dai , et al.
2019-04-30
Apparatus And Method Of Three Dimensional Conductive Lines
App 20190122960 - Lin; Chih-Yu ;   et al.
2019-04-25
Hybrid timing analysis method and associated system and non-transitory computer readable medium
Grant 10,268,787 - Dai , et al.
2019-04-23
Flying And Twisted Bit Line Architecture For Dual-port Static Random-access Memory (dp Sram)
App 20190108875 - Singh; Sahil Preet ;   et al.
2019-04-11
Memory Read Stability Enhancement With Short Segmented Bit Line Architecture
App 20190108874 - Sinangil; Mahmut ;   et al.
2019-04-11
Memory Circuit Having Shared Word Line
App 20190103158 - FUJIWARA; Hidehiro ;   et al.
2019-04-04
Low Voltage Bit-Cell
App 20190096476 - Chen; Yen-Huei ;   et al.
2019-03-28
Sram Based Authentication Circuit
App 20190096478 - LIN; Chien-Chen ;   et al.
2019-03-28
Write Assist for a Memory Device and Methods of Forming the Same
App 20190066774 - Singh; Sahil Preet ;   et al.
2019-02-28
Memory Array Circuit And Method Of Manufacturing The Same
App 20190067264 - FUJIWARA; Hidehiro ;   et al.
2019-02-28
Memory device with strap cells
Grant 10,204,660 - Chang , et al. Feb
2019-02-12
Static Random Access Memory With Write Assist Circuit
App 20190035455 - FUJIWARA; Hidehiro ;   et al.
2019-01-31
Antenna Diode Circuit
App 20190035779 - SINGH; Sahil Preet ;   et al.
2019-01-31
Hybrid Timing Analysis Method And Associated System And Non-transitory Computer Readable Medium
App 20190018917 - DAI; CHUN-JIUN ;   et al.
2019-01-17
Static random access memory circuits
Grant 10,176,864 - Wu , et al. J
2019-01-08
Configurable Memory Storage System
App 20190004718 - HSU; Yu-Hao ;   et al.
2019-01-03
Three dimensional dual-port bit cell and method of using same
Grant 10,163,497 - Chan , et al. Dec
2018-12-25
Memory circuit having shared word line
Grant 10,163,491 - Fujiwara , et al. Dec
2018-12-25
Apparatus and method of three dimensional conductive lines
Grant 10,163,759 - Lin , et al. Dec
2018-12-25
Memory Device With Reduced-resistance Interconnect
App 20180366467 - Singh; Sahil Preet ;   et al.
2018-12-20
Flying and twisted bit line architecture for dual-port static random-access memory (DP SRAM)
Grant 10,157,666 - Singh , et al. Dec
2018-12-18
SRAM-based authentication circuit
Grant 10,153,035 - Lin , et al. Dec
2018-12-11
Memory read stability enhancement with short segmented bit line architecture
Grant 10,153,038 - Sinangil , et al. Dec
2018-12-11
Memory device with reduced-resistance interconnect
Grant 10,134,737 - Singh , et al. November 20, 2
2018-11-20
Sense Amplifier Layout For Finfet Technology
App 20180330765 - CHEN; Yen-Huei ;   et al.
2018-11-15
Memory Macro And Method Of Operating The Same
App 20180294020 - SU; Chien-Kuo ;   et al.
2018-10-11
Semiconductor Memory With Respective Power Voltages For Memory Cells
App 20180277199 - WU; Wei-Cheng ;   et al.
2018-09-27
Three-dimensional three-port bit cell and method of assembling same
Grant 10,083,739 - Lin , et al. September 25, 2
2018-09-25
Apparatus And Method Of Three Dimensional Conductive Lines
App 20180269134 - Lin; Chih-Yu ;   et al.
2018-09-20
Digtial circuit structures
Grant 10,062,419 - Fujiwara , et al. August 28, 2
2018-08-28
Generating a collapsed VDD using a write-assist column to decrease a write voltage
Grant 10,037,796 - Singh , et al. July 31, 2
2018-07-31
Sense amplifier layout for FinFET technology
Grant 10,032,490 - Chen , et al. July 24, 2
2018-07-24
Memory Read Stability Enhancement With Short Segmented Bit Line Architecture
App 20180197601 - Sinangil; Mahmut ;   et al.
2018-07-12
Three Dimensional Dual-port Bit Cell And Method Of Using Same
App 20180190345 - Chan; Wei Min ;   et al.
2018-07-05
Method Of Providing Layout Design Of Sram Cell
App 20180166433 - FUJIWARA; HIDEHIRO ;   et al.
2018-06-14
Memory macro and method of operating the same
Grant 9,997,219 - Su , et al. June 12, 2
2018-06-12
Apparatus and method of three dimensional conductive lines
Grant 9,997,436 - Lin , et al. June 12, 2
2018-06-12
Semiconductor memory with respective power voltages for plurality of memory cells
Grant 9,997,235 - Wu , et al. June 12, 2
2018-06-12
Sram Cell For Interleaved Wordline Scheme
App 20180158510 - Fujiwara; Hidehiro ;   et al.
2018-06-07
Memory Cell
App 20180151226 - FUJIWARA; Hidehiro ;   et al.
2018-05-31
Generating A Collapsed Vdd Using A Write-assist Column To Decrease A Write Voltage
App 20180151220 - SINGH; Sahil Preet ;   et al.
2018-05-31
SRAM Circuits with Aligned Gate Electrodes
App 20180138186 - Chen; Fang ;   et al.
2018-05-17
Flying And Twisted Bit Line Architecture For Dual-port Static Random-access Memory (dp Sram)
App 20180137910 - Singh; Sahil Preet ;   et al.
2018-05-17
Method Of Writing To Memory Circuit Using Resistive Device
App 20180130809 - CHEN; Yen-Huei ;   et al.
2018-05-10
Sram-based Authentication Circuit
App 20180102163 - LIN; Chien-Chen ;   et al.
2018-04-12
Memory Device With Strap Cells
App 20180096710 - Chang; Jonathan Tsung-Yung ;   et al.
2018-04-05
Digtial Circuit Structures
App 20180090183 - Fujiwara; Hidehiro ;   et al.
2018-03-29
Flying and twisted bit line architecture for dual-port static random-access memory (DP SRAM)
Grant 9,928,899 - Singh , et al. March 27, 2
2018-03-27
Memory read stability enhancement with short segmented bit line architecture
Grant 9,922,700 - Sinangil , et al. March 20, 2
2018-03-20
Three dimensional dual-port bit cell and method of using same
Grant 9,905,292 - Chan , et al. February 27, 2
2018-02-27
Memory Macro And Method Of Operating The Same
App 20180053537 - SU; Chien-Kuo ;   et al.
2018-02-22
SRAM cell for interleaved wordline scheme
Grant 9,886,996 - Fujiwara , et al. February 6, 2
2018-02-06
SRAM circuits with aligned gate electrodes
Grant 9,871,046 - Chen , et al. January 16, 2
2018-01-16
Memory circuit having resistive device coupled with supply voltage line
Grant 9,865,605 - Chen , et al. January 9, 2
2018-01-09
Interconnect structure with misaligned metal lines coupled using different interconnect layer
Grant 9,865,542 - Liaw , et al. January 9, 2
2018-01-09
Layout scheme and method for forming device cells in semiconductor devices
Grant 9,853,035 - Pan , et al. December 26, 2
2017-12-26
Memory device with strap cells
Grant 9,842,627 - Chang , et al. December 12, 2
2017-12-12
Digtial circuit structures to control leakage current
Grant 9,837,130 - Fujiwara , et al. December 5, 2
2017-12-05
Memory Read Stability Enhancement With Short Segmented Bit Line Architecture
App 20170345485 - Sinangil; Mahmut ;   et al.
2017-11-30
Method for Eliminating False Paths of a Circuit Unit To Be Implemented Using a System
App 20170344696 - Dai; Chun-Jiun ;   et al.
2017-11-30
Memory macro and method of operating the same
Grant 9,824,729 - Su , et al. November 21, 2
2017-11-21
Memory circuit with negative voltage assist
Grant 9,812,191 - Chander , et al. November 7, 2
2017-11-07
Static random access memory (SRAM) with recovery circuit for a write operation
Grant 9,799,394 - Wu , et al. October 24, 2
2017-10-24
Static Random Access Memory Circuits
App 20170294224 - WU; Wei-Cheng ;   et al.
2017-10-12
Memory Macro And Method Of Operating The Same
App 20170278555 - SU; Chien-Kuo ;   et al.
2017-09-28
Layout Design for Manufacturing a Memory Cell
App 20170271342 - Fujiwara; Hidehiro ;   et al.
2017-09-21
Level Shifter Circuit Using Boosting Circuit
App 20170264276 - Sinangil; Mahmut ;   et al.
2017-09-14
Level shifter circuit using boosting circuit
Grant 9,762,216 - Sinangil , et al. September 12, 2
2017-09-12
SRAM Circuits with Aligned Gate Electrodes
App 20170243872 - Chen; Fang ;   et al.
2017-08-24
Memory with write assist circuit
Grant 9,741,429 - Chen , et al. August 22, 2
2017-08-22
Memory Circuit Having Resistive Device Coupled With Supply Voltage Line
App 20170207227 - CHEN; Yen-Huei ;   et al.
2017-07-20
Method of using a static random access memory
Grant 9,704,565 - Wu , et al. July 11, 2
2017-07-11
Digtial Circuit Structures To Control Leakage Current
App 20170194037 - FUJIWARA; HIDEHIRO ;   et al.
2017-07-06
Flying And Twisted Bit Line Architecture For Dual-port Static Random-access Memory (dp Sram)
App 20170186483 - Singh; Sahil Preet ;   et al.
2017-06-29
Memory Device With Reduced-resistance Interconnect
App 20170186750 - Singh; Sahil Preet ;   et al.
2017-06-29
Semiconductor Memory
App 20170178719 - WU; Wei-Cheng ;   et al.
2017-06-22
Voltage controller
Grant 9,685,223 - Wu , et al. June 20, 2
2017-06-20
Memory Device With Strap Cells
App 20170162232 - CHANG; Jonathan Tsung-Yung ;   et al.
2017-06-08
Three Dimensional Dual-port Bit Cell And Method Of Using Same
App 20170148507 - CHAN; Wei Min ;   et al.
2017-05-25
Memory device with self-boosted mechanism
Grant 9,659,620 - Chen , et al. May 23, 2
2017-05-23
Interconnect Structure With Misaligned Metal Lines Coupled Using Different Interconnect Layer
App 20170133320 - LIAW; JHON JHY ;   et al.
2017-05-11
Multi-port memory cell
Grant 9,640,251 - Fujiwara , et al. May 2, 2
2017-05-02
Sram Cell For Interleaved Wordline Scheme
App 20170110181 - Fujiwara; Hidehiro ;   et al.
2017-04-20
Memory Device And Fabrication Method Of The Same
App 20170110461 - FUJIWARA; Hidehiro ;   et al.
2017-04-20
Apparatus And Method Of Three Dimensional Conductive Lines
App 20170098596 - Lin; Chih-Yu ;   et al.
2017-04-06
Memory devices with strap cells
Grant 9,601,162 - Chang , et al. March 21, 2
2017-03-21
Memory Devices With Strap Cells
App 20170076755 - CHANG; Jonathan Tsung-Yung ;   et al.
2017-03-16
Interconnect structure with misaligned metal lines coupled using different interconnect layer
Grant 9,583,438 - Liaw , et al. February 28, 2
2017-02-28
Three dimensional dual-port bit cell and method of using same
Grant 9,576,645 - Chan , et al. February 21, 2
2017-02-21
Sense Amplifier Layout For Finfet Technology
App 20170032827 - CHEN; Yen-Huei ;   et al.
2017-02-02
Memory device
Grant 9,552,873 - Lin , et al. January 24, 2
2017-01-24
Memory arrangement
Grant 9,536,598 - Wu , et al. January 3, 2
2017-01-03
Memory Circuit Having Shared Word Line
App 20160372181 - FUJIWARA; Hidehiro ;   et al.
2016-12-22
Apparatus and method of three dimensional conductive lines
Grant 9,524,920 - Lin , et al. December 20, 2
2016-12-20
Multi-port Memory Cell
App 20160351252 - FUJIWARA; Hidehiro ;   et al.
2016-12-01
Memory device with stable writing and/or reading operation
Grant 9,496,026 - Hasan Taufique , et al. November 15, 2
2016-11-15
Memory Device With Stable Writing And/or Reading Operation
App 20160322098 - HASAN TAUFIQUE; Mohammed ;   et al.
2016-11-03
Sense amplifier layout for FinFET technology
Grant 9,466,493 - Chen , et al. October 11, 2
2016-10-11
Static Random Access Memory And Method Of Operating The Same
App 20160293248 - WU; Wei-Cheng ;   et al.
2016-10-06
Memory Device
App 20160284387 - CHEN; Yen-Huei ;   et al.
2016-09-29
Three-dimensional Three-port Bit Cell And Method Of Assembling Same
App 20160276019 - LIN; Tzu-Kuei ;   et al.
2016-09-22
Memory device
Grant 9,449,661 - Chen , et al. September 20, 2
2016-09-20
Memory circuit having shared word line
Grant 9,449,667 - Fujiwara , et al. September 20, 2
2016-09-20
Distributed metal routing
Grant 9,425,095 - Xiao , et al. August 23, 2
2016-08-23
Multi-port memory cell
Grant 9,418,729 - Fujiwara , et al. August 16, 2
2016-08-16
Layout design for manufacturing a memory cell
Grant 9,412,742 - Fujiwara , et al. August 9, 2
2016-08-09
Interconnect Structure With Misaligned Metal Lines Coupled Using Different Interconnect Layer
App 20160190065 - LIAW; JHON JHY ;   et al.
2016-06-30
Memory Device
App 20160163380 - LIN; Tzu-Kuei ;   et al.
2016-06-09
Method Of Using A Static Random Access Memory
App 20160148676 - WU; Wei-Cheng ;   et al.
2016-05-26
Multi-port Memory Cell
App 20160141019 - FUJIWARA; Hidehiro ;   et al.
2016-05-19
Boosted read write word line
Grant 9,343,140 - Chen , et al. May 17, 2
2016-05-17
Memory array
Grant 9,336,859 - Lin , et al. May 10, 2
2016-05-10
Memory Cell Having Multi-level Word Line
App 20160126178 - FUJIWARA; Hidehiro ;   et al.
2016-05-05
Static Random Access Memory And Method Of Controlling The Same
App 20160111143 - LIN; Chih-Yu ;   et al.
2016-04-21
Memory device
Grant 9,318,190 - Lin , et al. April 19, 2
2016-04-19
Memory Device
App 20160093366 - LIN; Tzu-Kuei ;   et al.
2016-03-31
Static random access memory and method of using the same
Grant 9,281,056 - Wu , et al. March 8, 2
2016-03-08
Three dimensional cross-access dual-port bit cell design
Grant 9,275,710 - Chan , et al. March 1, 2
2016-03-01
Memory Arrangement
App 20160042786 - Wu; Wei-Cheng ;   et al.
2016-02-11
Multi-port memory cell
Grant 9,257,172 - Fujiwara , et al. February 9, 2
2016-02-09
Three Dimensional Dual-port Bit Cell And Method Of Using Same
App 20160027501 - CHAN; Wei Min ;   et al.
2016-01-28
Three-dimensional Three-port Bit Cell And Method Of Assembling Same
App 20160019946 - LIN; Tzu-Kuei ;   et al.
2016-01-21
Boosted Read Write Word Line
App 20150380082 - Chen; Yen-Huei ;   et al.
2015-12-31
Static Random Access Memory And Method Of Using The Same
App 20150371702 - WU; Wei-Cheng ;   et al.
2015-12-24
Layout Design For Manufacturing A Memory Cell
App 20150357279 - FUJIWARA; Hidehiro ;   et al.
2015-12-10
Static random access memory with assist circuit
Grant 9,208,858 - Lin , et al. December 8, 2
2015-12-08
Three dimensional dual-port bit cell and method of assembling same
Grant 9,208,854 - Lin , et al. December 8, 2
2015-12-08
Static Random Access Memory And Method Of Controlling The Same
App 20150348598 - WANG; Li-Wen ;   et al.
2015-12-03
Three-dimensional two-port bit cell
Grant 9,202,557 - Wang , et al. December 1, 2
2015-12-01
Pre-colored methodology of multiple patterning
Grant 9,183,341 - Chen , et al. November 10, 2
2015-11-10
Memory Device
App 20150318036 - CHEN; Yen-Huei ;   et al.
2015-11-05
Memory Array
App 20150310908 - LIN; Tzu-Kuei ;   et al.
2015-10-29
Three dimensional dual-port bit cell and method of using same
Grant 9,171,849 - Chan , et al. October 27, 2
2015-10-27
Memory arrangement
Grant 9,165,623 - Wu , et al. October 20, 2
2015-10-20
Memory Circuit Having Shared Word Line
App 20150279453 - FUJIWARA; Hidehiro ;   et al.
2015-10-01
Wordline tracking for boosted-wordline timing scheme
Grant 9,142,275 - Wang , et al. September 22, 2
2015-09-22
Boosted read write word line
Grant 9,135,971 - Chen , et al. September 15, 2
2015-09-15
Distributed Metal Routing
App 20150255338 - Xiao; You-Cheng ;   et al.
2015-09-10
Dual port SRAM with dummy read recovery
Grant 9,129,707 - Lin , et al. September 8, 2
2015-09-08
Multi-port Memory Cell
App 20150248927 - FUJIWARA; Hidehiro ;   et al.
2015-09-03
Memory device and method for writing therefor
Grant 9,105,326 - Chen , et al. August 11, 2
2015-08-11
Memory cell and memory array
Grant 9,099,199 - Lin , et al. August 4, 2
2015-08-04
Power line lowering for write assisted control scheme
Grant 9,093,176 - Wu , et al. July 28, 2
2015-07-28
Pre-colored methodology of multiple patterning
Grant 9,075,936 - Chen , et al. July 7, 2
2015-07-07
Method of forming edge devices for improved performance
Grant 9,064,799 - Chen , et al. June 23, 2
2015-06-23
Three Dimensional Dual-port Bit Cell And Method Of Assembling Same
App 20150162074 - LIN; Tzu-Kuei ;   et al.
2015-06-11
Distributed metal routing
Grant 9,041,069 - Xiao , et al. May 26, 2
2015-05-26
Voltage Controller
App 20150131366 - Wu; Wei-Cheng ;   et al.
2015-05-14
Apparatus And Method Of Three Dimensional Conductive Lines
App 20150130068 - LIN; Chih-Yu ;   et al.
2015-05-14
Layout Scheme And Method For Forming Device Cells In Semiconductor Devices
App 20150118803 - PAN; Hsien-Yu ;   et al.
2015-04-30
Memory Arrangement
App 20150103576 - Wu; Wei-Cheng ;   et al.
2015-04-16
Dual Port Sram With Dummy Read Recovery
App 20150092476 - LIN; Kao-Cheng ;   et al.
2015-04-02
Three Dimensional Dual-port Bit Cell And Method Of Using Same
App 20150085556 - CHAN; Wei Min ;   et al.
2015-03-26
Three-dimensional Two-port Bit Cell
App 20150085567 - WANG; Li-Wen ;   et al.
2015-03-26
Three Dimensional Cross-access Dual-port Bit Cell Design
App 20150063040 - CHAN; Wei Min ;   et al.
2015-03-05
Bit cell internal voltage control
Grant 8,947,953 - Chan , et al. February 3, 2
2015-02-03
Sense Amplifier Layout For Finfet Technology
App 20150015335 - CHEN; Yen-Huei ;   et al.
2015-01-15
Layout scheme and method for forming device cells in semiconductor devices
Grant 8,928,113 - Pan , et al. January 6, 2
2015-01-06
Memory Device And Method For Writing Therefor
App 20140269024 - CHEN; Yen-Huei ;   et al.
2014-09-18
Boosted Read Write Word Line
App 20140211578 - Chen; Yen-Huei ;   et al.
2014-07-31
Pre-colored Methodology Of Multiple Patterning
App 20140201692 - CHEN; YEN-HUEI ;   et al.
2014-07-17
Built-in test circuit and method
Grant 8,773,930 - Lin , et al. July 8, 2
2014-07-08
Memory device and method for writing therefor
Grant 8,773,923 - Chen , et al. July 8, 2
2014-07-08
Bit Cell Internal Voltage Control
App 20140185363 - Chan; Wei Min ;   et al.
2014-07-03
SRAM differential voltage sensing apparatus
Grant 8,767,493 - Chen , et al. July 1, 2
2014-07-01
Power Line Lowering for Write Assisted Control Scheme
App 20140133219 - Wu; Wei-Cheng ;   et al.
2014-05-15
Semiconductor structure with dummy polysilicon lines
Grant 8,723,265 - Chen , et al. May 13, 2
2014-05-13
Wordline Tracking For Boosted-wordline Timing Scheme
App 20140119101 - Wang; Li-Wen ;   et al.
2014-05-01
Pre-colored methodology of multiple patterning
Grant 8,713,491 - Chen , et al. April 29, 2
2014-04-29
Data inversion for dual-port memory
Grant 8,693,265 - Lin , et al. April 8, 2
2014-04-08
Semiconductor device for word line driver with efficient routing of conductor for decreased gate resistance
Grant 8,692,333 - Chen , et al. April 8, 2
2014-04-08
Edge Devices Layout For Improved Performance
App 20140073124 - CHEN; Yen-Huei ;   et al.
2014-03-13
Optical clock signal distribution using through-silicon vias
Grant 8,670,637 - Chang , et al. March 11, 2
2014-03-11
Pre-colored Methodology Of Multiple Patterning
App 20140068531 - Chen; Yen-Huei ;   et al.
2014-03-06
Tracking cell and method for semiconductor memories
Grant 8,665,658 - Chen March 4, 2
2014-03-04
Leakage-aware keeper for semiconductor memory
Grant 8,644,087 - Lin , et al. February 4, 2
2014-02-04
Memory Device And Method For Writing Therefor
App 20140029358 - CHEN; Yen-Huei ;   et al.
2014-01-30
Data Inversion For Dual-port Memory
App 20140022852 - LIN; Tzu-Kuei ;   et al.
2014-01-23
Edge devices layout for improved performance
Grant 8,610,236 - Chen , et al. December 17, 2
2013-12-17
Integrated circuits, systems, and methods for reducing leakage currents in a retention mode
Grant 8,605,535 - Chen , et al. December 10, 2
2013-12-10
Pre-colored methodology of multiple patterning
Grant 8,601,411 - Chen , et al. December 3, 2
2013-12-03
Semiconductor memories
Grant 8,576,655 - Chan , et al. November 5, 2
2013-11-05
Sense amplifier with low sensing margin and high device variation tolerance
Grant 8,570,823 - Chen , et al. October 29, 2
2013-10-29
Memory circuit and method of writing datum to memory circuit
Grant 8,559,251 - Lin , et al. October 15, 2
2013-10-15
Pre-colored Methodology Of Multiple Patterning
App 20130263065 - Chen; Yen-Huei ;   et al.
2013-10-03
Pre-Colored Methodology of Multiple Patterning
App 20130263066 - Chen; Yen-Huei ;   et al.
2013-10-03
Memory Cell And Memory Array
App 20130242644 - LIN; Tzu-Kuei ;   et al.
2013-09-19
Built-in Test Circuit And Method
App 20130201776 - LIN; Tzu-Kuei ;   et al.
2013-08-08
Memory Circuit And Method Of Writing Datum To Memory Circuit
App 20130188433 - LIN; Chih-Yu ;   et al.
2013-07-25
Time Delay Circuit And Method Of Generating Time Delayed Signal
App 20130176062 - WANG; Li-Wen ;   et al.
2013-07-11
SRAM timing cell apparatus and methods
Grant 8,477,527 - Wang , et al. July 2, 2
2013-07-02
Tracking Cell And Method For Semiconductor Memories
App 20130148438 - CHEN; Yen-Huei
2013-06-13
Layouts of POLY cut openings overlapping active regions
Grant 8,455,354 - Chen , et al. June 4, 2
2013-06-04
Word line layout for semiconductor memory
Grant 8,406,028 - Lin , et al. March 26, 2
2013-03-26
Memory word-line driver having reduced power consumption
Grant 8,391,097 - Chan , et al. March 5, 2
2013-03-05
Integrated Circuits, Systems, And Methods For Reducing Leakage Currents In A Retention Mode
App 20130028008 - CHEN; Yen-Huei ;   et al.
2013-01-31
SRAM bit cell
Grant 8,363,454 - Wang , et al. January 29, 2
2013-01-29
Semiconductor Memories
App 20120327704A1 -
2012-12-27
SRAM Differential Voltage Sensing Apparatus
App 20120327730A1 -
2012-12-27

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