loadpatents
Patent applications and USPTO patent grants for Chen; Ya-Hsiang.The latest application filed is for "laminate circuit board structure".
Patent | Date |
---|---|
Laminate circuit board with a multi-layer circuit structure Grant 8,754,328 - Hsu , et al. June 17, 2 | 2014-06-17 |
Laminate Circuit Board Structure App 20130284500 - Hsu; Jun-Chung ;   et al. | 2013-10-31 |
Method Of Manufacturing A Laminate Circuit Board App 20130255858 - Hsu; Jun-Chung ;   et al. | 2013-10-03 |
Laminate Circuit Board With A Multi-layer Circuit Structure App 20130224513 - Hsu; Jun-Chung ;   et al. | 2013-08-29 |
Method Of Manufacturing A Laminate Circuit Board With A Multilayer Circuit Structure App 20130219713 - Hsu; Jun-Chung ;   et al. | 2013-08-29 |
Manufacturing method of a semiconductor load board Grant 8,377,815 - Chang , et al. February 19, 2 | 2013-02-19 |
Method for manufacturing a heat dissipation structure of a printed circuit board Grant 8,312,624 - Chang , et al. November 20, 2 | 2012-11-20 |
Semiconductor Load Board App 20120228011 - Chang; Chien-Wei ;   et al. | 2012-09-13 |
Manufacturing Method Of A Semiconductor Load Board App 20120231621 - Chang; Chien-Wei ;   et al. | 2012-09-13 |
Method for fabricating buried capacitor structure Grant 7,871,892 - Chang , et al. January 18, 2 | 2011-01-18 |
Method For Fabricating Buried Capacitor Structure App 20100307666 - Chang; Chien-Wei ;   et al. | 2010-12-09 |
Buried Capacitor Structure App 20100309608 - Chang; Chien-Wei ;   et al. | 2010-12-09 |
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