Chen; Suwei
Patent Applications and Registrations
Patent applications and USPTO patent grants for Chen; Suwei.The latest application filed is for "programmable delay for clock phase error correction".
- Chen; Suwei - Hillsboro OR
- Chen; Suwei - Starkville MS
- Chen; Suwei - Redmond WA
- Chen; Suwei - Mississippi State MS
| Patent | Date |
|---|---|
| Programmable delay for clock phase error correction Grant 7,545,194 - Chen , et al. June 9, 2 | 2009-06-09 |
| Clock error detection circuits, methods, and systems Grant 7,339,403 - Chen , et al. March 4, 2 | 2008-03-04 |
| Programmable delay for clock phase error correction App 20080012653 - Chen; Suwei ; et al. | 2008-01-17 |
| Clock error detection circuits, methods, and systems App 20080001637 - Chen; Suwei ; et al. | 2008-01-03 |
| System and method for reducing skew in complementary signals that can be used to synchronously clock a double data rate output Grant 7,135,899 - Sancheti , et al. November 14, 2 | 2006-11-14 |
| Data path configurable for multiple clocking arrangements Grant 7,132,854 - Chen , et al. November 7, 2 | 2006-11-07 |
| Delay circuit that scales with clock cycle time Grant 7,019,576 - Sancheti , et al. March 28, 2 | 2006-03-28 |
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