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DRAM, memory controller and associated training method
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Semiconductor devices and methods for enhancing signal integrity of an interface provided by a semiconductor device
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Memory device, memory controller and associated memory system operated according to selected clock signals
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Multi-rank Topology Of Memory Module And Associated Control Method
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Semiconductor Devices And Methods For Enhancing Signal Integrity Of An Interface Provided By A Semiconductor Device
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Memory module, memory controller and associated control method for read training technique
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Multi-rank Topology Of Memory Module And Associated Control Method
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Memory capable of entering/exiting power down state during self-refresh period and associated memory controller and memory system
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Memory Device, Memory Controller And Associated Memory System
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Memory controller, memory module and memory system
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Integrated circuit, electronic device and method for transmitting data in electronic device
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Dram, Memory Controller And Associated Training Method
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Memory interface circuit capable of controlling driving ability and associated control method
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Jitter control circuit within chip and associated jitter control method
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Memory Module, Memory Controller And Associated Control Method For Read Training Technique
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Method for performing signal control of an electronic device, and associated apparatus
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Method for performing memory interface calibration in an electronic device, and associated apparatus and associated memory controller
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Apparatus for performing signal driving in an electronic device with aid of different types of decoupling capacitors for pre-driver and post-driver
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Termination topology of memory system and associated memory module and control method
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Termination Topology Of Memory System And Associated Memory Module And Control Method
App 20170243628 - Chen; Shang-Pin | 2017-08-24 |
Termination Topology Of Memory System And Associated Memory Module And Control Method
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Memory Interface Circuit Capable Of Controlling Driving Ability And Associated Control Method
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Memory Interface Circuit Having Signal Detector For Detecting Clock Signal
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Method For Performing Signal Control Of An Electronic Device, And Associated Apparatus
App 20170147030 - Chen; Shang-Pin ; et al. | 2017-05-25 |
Memory Capable Of Entering/exiting Power Down State During Self-refresh Period And Associated Memory Controller And Memory System
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Integrated Circuit, Electronic Device And Method For Transmitting Data In Electronic Device
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Method for performing memory interface control of an electronic device, and associated apparatus
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Apparatus for performing signal driving with aid of metal oxide semiconductor field effect transistor
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Apparatus For Performing Signal Driving In An Electronic Device With Aid Of Different Types Of Decoupling Capacitors For Pre-driver And Post-driver
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USB device for making I/O pin with intact voltage during charging procedure and related method
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Jitter Control Circuit Within Chip And Associated Jitter Control Method
App 20160359488 - Chen; Shang-Pin ; et al. | 2016-12-08 |
Method for performing signal driving control in an electronic device with aid of driving control signals, and associated apparatus
Grant 9,473,142 - Chen , et al. October 18, 2 | 2016-10-18 |
Universal Serial Bus Device And Related Method
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Method For Performing Signal Driving Control In An Electronic Device With Aid Of Driving Control Signals, And Associated Apparatus
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Method For Performing Impedance Profile Control Of A Power Delivery Network In An Electronic Device, And Associated Apparatus
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Apparatus For Performing Signal Driving With Aid Of Metal Oxide Semiconductor Field Effect Transistor, And Associated Integrated Circuit
App 20150256173 - Chen; Shang-Pin | 2015-09-10 |
Method For Performing Memory Interface Control Of An Electronic Device, And Associated Apparatus
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Method For Performing Memory Interface Calibration In An Electronic Device, And Associated Apparatus And Associated Memory Controller
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Memory Controller, Memory Module And Memory System
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