| Patent | Date |
|---|
Mask Cleaning
App 20220179326 - Chang; Shu-Hao ; et al. | 2022-06-09 |
Mask cleaning
Grant 11,256,179 - Chang , et al. February 22, 2 | 2022-02-22 |
Configuring And Authenticating A Health Device
App 20200388392 - Chen; Norman ; et al. | 2020-12-10 |
Mask Cleaning
App 20200050118 - Chang; Shu-Hao ; et al. | 2020-02-13 |
Mask cleaning
Grant 10,459,352 - Chang , et al. Oc | 2019-10-29 |
Generating risk inventory and common process window for adjustment of manufacturing tool
Grant 10,401,837 - Zhang , et al. Sep | 2019-09-03 |
Methodology for post-integration awareness in optical proximity correction
Grant 10,386,715 - Wang , et al. A | 2019-08-20 |
Methodology For Post-integration Awareness In Optical Proximity Correction
App 20190113837 - WANG; Feng ; et al. | 2019-04-18 |
Generating Risk Inventory And Common Process Window For Adjustment Of Manufacturing Tool
App 20190101905 - Zhang; Hongxin ; et al. | 2019-04-04 |
Method providing for asymmetric pupil configuration for an extreme ultraviolet lithography process
Grant 9,886,543 - Chung , et al. February 6, 2 | 2018-02-06 |
Method Providing For Asymmetric Pupil Configuration For An Extreme Ultraviolet Lithography Process
App 20170228490 - Chung; Chia-Chun ; et al. | 2017-08-10 |
Mask Cleaning
App 20170060005 - Chang; Shu-Hao ; et al. | 2017-03-02 |
Device resulting from printing minimum width semiconductor features at non-minimum pitch
Grant 9,484,300 - Ghosh , et al. November 1, 2 | 2016-11-01 |
Methods for retargeting circuit design layouts and for fabricating semiconductor devices using retargeted layouts
Grant 9,443,055 - Hamouda , et al. September 13, 2 | 2016-09-13 |
Methods For Retargeting Circuit Design Layouts And For Fabricating Semiconductor Devices Using Retargeted Layouts
App 20160188781 - Hamouda; Ayman ; et al. | 2016-06-30 |
Methodology for implementing enhanced optical lithography for hole patterning in semiconductor fabrication
Grant 9,366,969 - Liu , et al. June 14, 2 | 2016-06-14 |
Printing Minimum Width Features At Non-minimum Pitch And Resulting Device
App 20160093565 - GHOSH; Sonia ; et al. | 2016-03-31 |
Printing minimum width semiconductor features at non-minimum pitch and resulting device
Grant 9,263,349 - Ghosh , et al. February 16, 2 | 2016-02-16 |
Method for fabricating a semiconductor integrated circuit with a litho-etch, litho-etch process for etching trenches
Grant 9,171,735 - Mehta , et al. October 27, 2 | 2015-10-27 |
Contrast enhancing exposure system and method for use in semiconductor fabrication
Grant 9,091,923 - Liu , et al. July 28, 2 | 2015-07-28 |
Retargeting semiconductor device shapes for multiple patterning processes
Grant 9,064,086 - Sun , et al. June 23, 2 | 2015-06-23 |
Printing Minimum Width Features At Non-minimum Pitch And Resulting Device
App 20150130026 - GHOSH; Sonia ; et al. | 2015-05-14 |
Power rail layout for dense standard cell library
Grant 9,026,977 - Tarabbia , et al. May 5, 2 | 2015-05-05 |
Power Rail Layout For Dense Standard Cell Library
App 20150052494 - TARABBIA; Marc ; et al. | 2015-02-19 |
Retargeting Semiconductor Device Shapes For Multiple Patterning Processes
App 20150046887 - Sun; Yuyang ; et al. | 2015-02-12 |
Retargeting semiconductor device shapes for multiple patterning processes
Grant 8,910,094 - Sun , et al. December 9, 2 | 2014-12-09 |
Method For Fabricating A Semiconductor Integrated Circuit With A Litho-etch, Litho-etch Process For Etching Trenches
App 20140235055 - Mehta; Sohan ; et al. | 2014-08-21 |
Retargeting Semiconductor Device Shapes For Multiple Patterning Processes
App 20140223390 - Sun; Yuyang ; et al. | 2014-08-07 |
Use of polarization and composite illumination source for advanced optical lithography
Grant 8,612,904 - Wang , et al. December 17, 2 | 2013-12-17 |
Methodology For Implementing Enhanced Optical Lithography For Hole Patterning In Semiconductor Fabrication
App 20130286371 - Liu; George ; et al. | 2013-10-31 |
Methodology for implementing enhanced optical lithography for hole patterning in semiconductor fabrication
Grant 8,472,005 - Liu , et al. June 25, 2 | 2013-06-25 |
Utilization of electric field with isotropic development in photolithography
Grant 7,838,205 - Chang , et al. November 23, 2 | 2010-11-23 |
Semiconductor device having in-chip critical dimension and focus patterns
Grant 7,642,101 - Liu , et al. January 5, 2 | 2010-01-05 |
Immersion lithography process and mask layer structure applied in the same
Grant 7,432,042 - Chang , et al. October 7, 2 | 2008-10-07 |
Contrast Enhancing Exposure System and Method For Use In Semiconductor Fabrication
App 20080206679 - Liu; George ; et al. | 2008-08-28 |
Methodology For Implementing Enhanced Optical Lithography For Hole Patterning In Semiconductor Fabrication
App 20080204688 - Liu; George ; et al. | 2008-08-28 |
Top patterned hardmask and method for patterning
Grant 7,387,969 - Liu , et al. June 17, 2 | 2008-06-17 |
Semiconductor Device Having In-Chip Critical Dimension and Focus Patterns
App 20080128924 - Liu; George ; et al. | 2008-06-05 |
Utilization Of Electric Field With Isotropic Development In Photolithography
App 20080008967 - CHANG; Vincent ; et al. | 2008-01-10 |
Top patterned hardmask and method for patterning
App 20060211254 - Liu; George ; et al. | 2006-09-21 |
Immersion lithography process and mask layer structure applied in the same
App 20050123863 - Chang, Vencent ; et al. | 2005-06-09 |
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