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name:-0.014472007751465
name:-0.010957002639771
name:-0.00099897384643555
Chen; Kuang Ting Patent Filings

Chen; Kuang Ting

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chen; Kuang Ting.The latest application filed is for "two-stage read/write 3d architecture for memory devices".

Company Profile
0.12.11
  • Chen; Kuang Ting - Taipei TW
  • Chen; Kuang Ting - Taipei City TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Two-stage read/write 3D architecture for memory devices
Grant 9,851,915 - Chen , et al. December 26, 2
2017-12-26
Two-stage Read/write 3d Architecture For Memory Devices
App 20170285990 - Chen; Kuang Ting ;   et al.
2017-10-05
Two-stage read/write 3D architecture for memory devices
Grant 9,690,510 - Chen , et al. June 27, 2
2017-06-27
Memory circuit and method for routing the memory circuit
Grant 9,490,005 - Lee , et al. November 8, 2
2016-11-08
Memory cell array including a write-assist circuit and embedded coupling capacitor and method of forming same
Grant 9,281,311 - Wu , et al. March 8, 2
2016-03-08
Read-only memory
Grant 9,275,752 - Chen , et al. March 1, 2
2016-03-01
Simultaneous two/dual port access on 6T SRAM
Grant 9,230,622 - Wu , et al. January 5, 2
2016-01-05
Two-stage Read/write 3d Architecture For Memory Devices
App 20150309750 - Chen; Kuang Ting ;   et al.
2015-10-29
Read-only Memory
App 20150310924 - Chen; Kuang Ting ;   et al.
2015-10-29
Method And Apparatus For Forming An Integrated Circuit With A Metalized Coupling Capacitor
App 20150076575 - WU; Ching-Wei ;   et al.
2015-03-19
N-bit rom cell
Grant 8,837,192 - Wu , et al. September 16, 2
2014-09-16
Simultaneous Two/Dual Port Access on 6T SRAM
App 20140153349 - Wu; Ching-Wei ;   et al.
2014-06-05
N-bit Rom Cell
App 20140112048 - Wu; Ching-Wei ;   et al.
2014-04-24
Asymmetric sense amplifier design
Grant 8,675,435 - Wu , et al. March 18, 2
2014-03-18
Asymmetric Sense Amplifier Design
App 20130235687 - Wu; Ching-Wei ;   et al.
2013-09-12
Memory Circuit And Method For Routing The Memory Circuit
App 20130188417 - LEE; Cheng Hung ;   et al.
2013-07-25
Asymmetric sense amplifier design
Grant 8,437,210 - Wu , et al. May 7, 2
2013-05-07
Memory circuits, systems, and methods for routing the memory circuits
Grant 8,411,479 - Lee , et al. April 2, 2
2013-04-02
Asymmetric Sense Amplifier Design
App 20120213010 - Wu; Ching-Wei ;   et al.
2012-08-23
Memory Devices
App 20120014158 - WU; Ching-Wei ;   et al.
2012-01-19
Memory Circuits, Systems, And Methods For Routing The Memory Circuits
App 20110019458 - Lee; Cheng Hung ;   et al.
2011-01-27

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