loadpatents
Patent applications and USPTO patent grants for Chen; Jung-Hua.The latest application filed is for "purge load port".
Patent | Date |
---|---|
Purge load port Grant 10,553,467 - Chen , et al. Fe | 2020-02-04 |
Purge Load Port App 20170069516 - CHEN; JUNG-HUA ;   et al. | 2017-03-09 |
Fabricating method of vertical transistor Grant 8,003,457 - Chen August 23, 2 | 2011-08-23 |
Fabricating Method Of Vertical Transistor App 20110159652 - Chen; Jung-Hua | 2011-06-30 |
Vertical transistor and array with vertical transistors Grant 7,968,937 - Wang , et al. June 28, 2 | 2011-06-28 |
Vertical transistor and vertical transistor array Grant 7,928,490 - Chen April 19, 2 | 2011-04-19 |
Vertical Transistor And Fabricating Method Thereof And Vertical Transistor Array App 20100102361 - Chen; Jung-Hua | 2010-04-29 |
Vertical Transistor And Array With Vertical Transistors App 20100038709 - Wang; Kuo-Chen ;   et al. | 2010-02-18 |
Ia Switch App 20040188231 - Chen, Kuo-Sheng ;   et al. | 2004-09-30 |
IA switch Grant 6,791,041 - Chen , et al. September 14, 2 | 2004-09-14 |
Paper clip with multiple overlapped clipping portions App 20020104199 - Chen, Jung-Hua | 2002-08-08 |
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