Chen; Jun W.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Chen; Jun W..The latest application filed is for "mos transistor having adjusted threshold voltage formed along with other transistors".
- Chen; Jun W. - Saratoga CA
- Chen; Jun W. - Sarasota CA
| Patent | Date |
|---|---|
| MOS transistor having adjusted threshold voltage formed along with other transistors Grant 5,618,743 - Williams , et al. April 8, 1 | 1997-04-08 |
| BiCDMOS process technology Grant 5,559,044 - Williams , et al. September 24, 1 | 1996-09-24 |
| Method for forming a zener diode region and an isolation region Grant 5,547,880 - Williams , et al. August 20, 1 | 1996-08-20 |
| Structure of power mosfets, including termination structures Grant 5,521,409 - Hshieh , et al. May 28, 1 | 1996-05-28 |
| Bidirectional blocking lateral MOSFET with improved on-resistance Grant 5,451,533 - Williams , et al. September 19, 1 | 1995-09-19 |
| Low on-resistance power MOS technology Grant 5,429,964 - Yilmaz , et al. July 4, 1 | 1995-07-04 |
| BICDMOS structures Grant 5,426,328 - Yilmaz , et al. June 20, 1 | 1995-06-20 |
| BiCDMOS structure Grant 5,422,508 - Yilmaz , et al. June 6, 1 | 1995-06-06 |
| Bidirectional blocking lateral MOSFET with improved on-resistance Grant 5,420,451 - Williams , et al. May 30, 1 | 1995-05-30 |
| Method of making BiCDMOS structures Grant 5,416,039 - Yilmaz , et al. May 16, 1 | 1995-05-16 |
| Structure and fabrication of power MOSFETs, including termination structures Grant 5,404,040 - Hshieh , et al. April 4, 1 | 1995-04-04 |
| Method for forming a BiCDMOS Grant 5,374,569 - Yilmaz , et al. December 20, 1 | 1994-12-20 |
| Low on-resistance power MOS technology Grant 5,304,831 - Yilmaz , et al. April 19, 1 | 1994-04-19 |
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