Chen, Jiasheng
USPTO Trademark & Patent Filings
Trademark applications and grants for Chen, Jiasheng. Chen, Jiasheng has 3 trademark applications. The latest application filed is for "TADXCJZ"
- Company Aliases
- Chen Jiasheng
- Chen, Jiasheng
- jiasheng chen
- Chen; Jiasheng - El Dorado Hills CA
- CHEN; Jiasheng - Orlando FL
- Chen; Jiasheng - Orlando FL
- Chen; Jiasheng - Jiangsu CN
| Entity Type | INDIVIDUAL |
| Address | No.10 Taoyuandong,Qidou Vil., Linglu Township,Yongtai County, Fuzhou City CHINA 350700 |
Trademarks Patents
| Patent Application | Date |
|---|---|
| RANDOM SPARSITY HANDLING IN A SYSTOLIC ARRAY 20220309124 - 17/211627 Mei; Chunhui ; et al. | 2022-09-29 |
| ARITHMETIC LOGIC UNIT REGISTER SEQUENCING 20220171621 - 17/574026 HE; Bin ; et al. | 2022-06-02 |
| LOW POWER AND LOW LATENCY GPU COPROCESSOR FOR PERSISTENT COMPUTING 20210201439 - 17/181300 Chen; Jiasheng ; et al. | 2021-07-01 |
| DEDICATED VECTOR SUB-PROCESSOR SYSTEM 20210157588 - 16/697660 CHEN; Jiasheng ; et al. | 2021-05-27 |
| ARITHEMETIC LOGIC UNIT REGISTER SEQUENCING 20210157581 - 16/696108 HE; Bin ; et al. | 2021-05-27 |
| Method for detecting open phase of startup/standby transformer based on optical CT 11,422,204 - 16/962,692 Chen , et al. August 23, 2 | 2022-08-23 |
| Pairing SIMD lanes to perform double precision operations 11,409,536 - 15/342,809 He , et al. August 9, 2 | 2022-08-09 |
| Hybrid matrix multiplication pipeline 11,347,827 - 16/287,013 Chen , et al. May 31, 2 | 2022-05-31 |
| Arithemetic logic unit register sequencing 11,237,827 - 16/696,108 He , et al. February 1, 2 | 2022-02-01 |
| Stream processor with decoupled crossbar for cross lane operations 10,970,081 - 15/637,629 Chen , et al. April 6, 2 | 2021-04-06 |
Mark Image Registration | Serial | Trademark Application Date |
|---|---|
"TADXCJZ" 97801132 |
TADXCJZ 2023-02-18 |
"BBBYDDD" 97609878 |
BBBYDDD 2022-09-28 |
"BBBYDDD" 97599920 |
BBBYDDD 2022-09-21 |
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