Chen; I-Nan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chen; I-Nan.The latest application filed is for "hybrid bonding technology for stacking integrated circuits".

Company Profile

10.9.10

Chen; I-Nan - Taipei City TW
Chen; I-Nan - Taipei TW
Chen; I-Nan - Taichung County TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Hybrid Bonding Technology For Stacking Integrated Circuits App 20220262770 - Wu; Kuo-Ming ; et al.	2022-08-18
Hybrid bonding technology for stacking integrated circuits Grant 11,410,972 - Wu , et al. August 9, 2	2022-08-09
Semiconductor structure and method of manufacturing the same Grant 11,374,046 - Li , et al. June 28, 2	2022-06-28
Hybrid bonding technology for stacking integrated circuits Grant 11,322,481 - Wu , et al. May 3, 2	2022-05-03
Semiconductor Structure Having Integrated Inductor Therein App 20210242303 - LEE; MING-CHE ; et al.	2021-08-05
Semiconductor structure having integrated inductor therein Grant 11,011,600 - Lee , et al. May 18, 2	2021-05-18
Hybrid Bonding Technology For Stacking Integrated Circuits App 20200312817 - Wu; Kuo-Ming ; et al.	2020-10-01
Hybrid Bonding Technology For Stacking Integrated Circuits App 20200303351 - Wu; Kuo-Ming ; et al.	2020-09-24
Semiconductor Structure And Method Of Manufacturing The Same App 20200243582 - LI; SHENG-CHAN ; et al.	2020-07-30
Hybrid bonding technology for stacking integrated circuits Grant 10,727,205 - Wu , et al.	2020-07-28
Semiconductor structure and method of manufacturing the same Grant 10,658,409 - Li , et al.	2020-05-19
Semiconductor Structure Having Integrated Inductor Therein App 20200152728 - LEE; MING-CHE ; et al.	2020-05-14
Hybrid bonding technology for stacking integrated circuits App 20200058617 - Wu; Kuo-Ming ; et al.	2020-02-20
Semiconductor structure having integrated inductor therein Grant 10,541,297 - Lee , et al. Ja	2020-01-21
Semiconductor Structure And Method Of Manufacturing The Same App 20190157322 - LI; SHENG-CHAN ; et al.	2019-05-23
Semiconductor Structure Having Integrated Inductor Therein App 20190109185 - LEE; MING-CHE ; et al.	2019-04-11
Semiconductor structure having integrated inductor therein Grant 10,164,001 - Lee , et al. Dec	2018-12-25
Method for erasing and changing data of floating gate flash memory Grant 7,525,848 - Wang , et al. April 28, 2	2009-04-28
Method for erasing and changing data of floating gate flash memory App 20080304329 - Wang; Yung-Hsin ; et al.	2008-12-11

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