Chen; Huang-Yu
Patent Applications and Registrations
Patent applications and USPTO patent grants for Chen; Huang-Yu.The latest application filed is for "clock signal distribution system, integrated circuit device and method".
Company Profile
4.55.49
- Chen; Huang-Yu - Zhudong Township Hsinchu County TW
- CHEN; Huang-Yu - Hsinchu TW
- CHEN; HUANG-YU - HSINCHU COUNTY TW
- Chen; Huang-Yu - Hsin-Chu TW
- CHEN; Huang-Yu - Tainan City TW
- CHEN; Huang-Yu - Hsinchu City TW
- Chen; Huang-Yu - Zhudong Township, Hsinchu County N/A TW
- Chen; Huang-Yu - Taipei TW
Patent Activity
| Patent | Date |
|---|---|
| Method of cutting conductive patterns Grant 11,429,028 - Hsu , et al. August 30, 2 | 2022-08-30 |
| Clock Signal Distribution System, Integrated Circuit Device And Method App 20220214712 - KAO; Jerry Chang Jui ; et al. | 2022-07-07 |
| Circuit Layouts And Related Methods App 20220035982 - LIN; CHIN-SHEN ; et al. | 2022-02-03 |
| Method and associated system for circuit design Grant 11,200,364 - Chen , et al. December 14, 2 | 2021-12-14 |
| Cell Layout Of Semiconductor Device App 20210133384 - CHUANG; Yi-Lin ; et al. | 2021-05-06 |
| Method And Associated System For Circuit Design App 20210089630 - CHEN; CHIA CHENG ; et al. | 2021-03-25 |
| Cell layout of semiconductor device Grant 10,922,466 - Chuang , et al. February 16, 2 | 2021-02-16 |
| Method Of Cutting Conductive Patterns App 20200081348 - Hsu; Chin-Hsiung ; et al. | 2020-03-12 |
| Method of cutting conductive patterns Grant 10,509,322 - Hsu , et al. Dec | 2019-12-17 |
| Cell Layout Of Semiconductor Device App 20190108302 - CHUANG; Yi-Lin ; et al. | 2019-04-11 |
| Cell layout of semiconductor device Grant 10,162,925 - Chuang , et al. Dec | 2018-12-25 |
| Duplicate layering and routing Grant 9,893,009 - Chen , et al. February 13, 2 | 2018-02-13 |
| Layout optimization for integrated circuit design Grant 9,754,073 - Chen , et al. September 5, 2 | 2017-09-05 |
| Methods for double-patterning-compliant standard cell design Grant 9,747,402 - Chen , et al. August 29, 2 | 2017-08-29 |
| Method For Reducing Light-induced-degradation In Manufacturing Solar Cell App 20170117197 - KUO; Kuang-Yang ; et al. | 2017-04-27 |
| Cell Layout Of Semiconductor Device App 20170083654 - CHUANG; Yi-Lin ; et al. | 2017-03-23 |
| Method for checking and fixing double-patterning layout Grant 9,594,866 - Wang , et al. March 14, 2 | 2017-03-14 |
| Layout Optimization for Integrated Circuit Design App 20160350473 - Chen; Huang-Yu ; et al. | 2016-12-01 |
| Method Of Cutting Conductive Patterns App 20160320706 - HSU; Chin-Hsiung ; et al. | 2016-11-03 |
| Method for displaying timing information of an integrated circuit floorplan in real time Grant 9,471,742 - Chuang , et al. October 18, 2 | 2016-10-18 |
| Layout optimization for integrated circuit design Grant 9,418,196 - Chen , et al. August 16, 2 | 2016-08-16 |
| Stitch and trim methods for double patterning compliant standard cell design Grant 9,384,307 - Hsu , et al. July 5, 2 | 2016-07-05 |
| Method of cutting conductive patterns Grant 9,380,709 - Hsu , et al. June 28, 2 | 2016-06-28 |
| Promoting efficient cell usage to boost QoR in automated design Grant 9,355,202 - Chen , et al. May 31, 2 | 2016-05-31 |
| Double patterning technology (DPT) layout routing Grant 9,317,650 - Chen , et al. April 19, 2 | 2016-04-19 |
| Layout optimization for integrated circuit design Grant 9,292,645 - Chen , et al. March 22, 2 | 2016-03-22 |
| Layout method and system for multi-patterning integrated circuits Grant 9,262,577 - Chen , et al. February 16, 2 | 2016-02-16 |
| Multiple via connections using connectivity rings Grant 9,213,795 - Hsu , et al. December 15, 2 | 2015-12-15 |
| Duplicate Layering And Routing App 20150200159 - Chen; Huang-Yu ; et al. | 2015-07-16 |
| Layout Optimization For Integrated Circuit Design App 20150199469 - Chen; Huang-Yu ; et al. | 2015-07-16 |
| Base Assembly For Office Chair App 20150122958 - Chen; Huang-Yu | 2015-05-07 |
| Promoting Efficient Cell Usage To Boost Qor In Automated Design App 20150128101 - Chen; Huang-Yu ; et al. | 2015-05-07 |
| Compression method and system for use with multi-patterning Grant 9,026,953 - Chen , et al. May 5, 2 | 2015-05-05 |
| Methods for Double-Patterning-Compliant Standard Cell Design App 20150095870 - Chen; Huang-Yu ; et al. | 2015-04-02 |
| Layout Optimization For Integrated Circuit Design App 20150082259 - CHEN; HUANG-YU ; et al. | 2015-03-19 |
| Method and system for replacing a pattern in a layout Grant 8,977,991 - Chen , et al. March 10, 2 | 2015-03-10 |
| Method for Displaying Timing Information of an Integrated Circuit Floorplan App 20150046890 - Chuang; Yi-Lin ; et al. | 2015-02-12 |
| Double Patterning Technology (dpt) Layout Routing App 20150012895 - Chen; Huang-Yu ; et al. | 2015-01-08 |
| Layout re-decomposition for multiple patterning layouts Grant 8,914,755 - Hsu , et al. December 16, 2 | 2014-12-16 |
| Methods for double-patterning-compliant standard cell design Grant 8,907,441 - Chen , et al. December 9, 2 | 2014-12-09 |
| Layout Re-decomposition For Multiple Patterning Layouts App 20140359544 - Hsu; Chin-Hsiung ; et al. | 2014-12-04 |
| Layout optimization for integrated design Grant 8,898,600 - Chen , et al. November 25, 2 | 2014-11-25 |
| Method for displaying timing information of an integrated circuit floorplan Grant 8,898,608 - Chuang , et al. November 25, 2 | 2014-11-25 |
| Reusable cut mask for multiple layers Grant 8,875,067 - Hsu , et al. October 28, 2 | 2014-10-28 |
| Standard Cell Design Layout App 20140298284 - Hsu; Chin-Hsiung ; et al. | 2014-10-02 |
| Double patterning technology (DPT) layout routing Grant 8,850,368 - Chen , et al. September 30, 2 | 2014-09-30 |
| Reusable Cut Mask For Multiple Layers App 20140282287 - Hsu; Chin-Hsiung ; et al. | 2014-09-18 |
| Method Of Cutting Conductive Patterns App 20140259658 - HSU; Chin-Hsiung ; et al. | 2014-09-18 |
| Layout Optimization for Integrated Design App 20140282306 - Chen; Huang-Yu ; et al. | 2014-09-18 |
| Layout Method And System For Multi-patterning Integrated Circuits App 20140237435 - CHEN; Huang-Yu ; et al. | 2014-08-21 |
| Multiple via connections using connectivity rings Grant 8,813,016 - Hsu , et al. August 19, 2 | 2014-08-19 |
| Self-aligned multiple patterning layout design Grant 8,799,834 - Chen , et al. August 5, 2 | 2014-08-05 |
| Double Patterning Technology (dpt) Layout Routing App 20140215428 - Chen; Huang-Yu ; et al. | 2014-07-31 |
| Self-aligned Multiple Patterning Layout Design App 20140215421 - Chen; Huang-Yu ; et al. | 2014-07-31 |
| Layout method and system for multi-patterning integrated circuits Grant 8,745,556 - Chen , et al. June 3, 2 | 2014-06-03 |
| Automatic place and route method for electromigration tolerant power distribution Grant 8,694,945 - Wang , et al. April 8, 2 | 2014-04-08 |
| Double patterning methodology Grant 8,683,392 - Hsieh , et al. March 25, 2 | 2014-03-25 |
| Method And System For Replacing A Pattern In A Layout App 20140059504 - CHEN; Huang-Yu ; et al. | 2014-02-27 |
| Compression Method And System For Use With Multi-patterning App 20140053118 - CHEN; Huang-Yu ; et al. | 2014-02-20 |
| Layout Method And System For Multi-patterning Integrated Circuits App 20140007026 - CHEN; Huang-Yu ; et al. | 2014-01-02 |
| Stitch And Trim Methods For Double Patterning Compliant Standard Cell Design App 20130339911 - HSU; Chin-Hsiung ; et al. | 2013-12-19 |
| Compression method and system for use with multi-patterning Grant 8,601,409 - Chen , et al. December 3, 2 | 2013-12-03 |
| Method and system for replacing a pattern in a layout Grant 8,601,408 - Chen , et al. December 3, 2 | 2013-12-03 |
| Cell layout for multiple patterning technology Grant 8,584,052 - Chen , et al. November 12, 2 | 2013-11-12 |
| Stitch and trim methods for double patterning compliant standard cell design Grant 8,539,396 - Hsu , et al. September 17, 2 | 2013-09-17 |
| Stitch And Trim Methods For Double Patterning Compliant Standard Cell Design App 20130174106 - HSU; Chin-Hsiung ; et al. | 2013-07-04 |
| Automatic Place and Route Method for Electromigration Tolerant Power Distribution App 20130154128 - Wang; Chung-Hsing ; et al. | 2013-06-20 |
| Systems and methods for creating frequency-dependent netlist Grant 8,453,095 - Su , et al. May 28, 2 | 2013-05-28 |
| Tool and method for eliminating multi-patterning conflicts Grant 8,448,100 - Lin , et al. May 21, 2 | 2013-05-21 |
| Method And System For Replacing A Pattern In A Layout App 20130091476 - CHEN; Huang-Yu ; et al. | 2013-04-11 |
| Chip-level ECO shrink Grant 8,418,117 - Chen , et al. April 9, 2 | 2013-04-09 |
| Method and apparatus for achieving multiple patterning technology compliant design layout Grant 8,418,111 - Chen , et al. April 9, 2 | 2013-04-09 |
| Method For Checking And Fixing Double-patterning Layout App 20130080980 - WANG; Dio ; et al. | 2013-03-28 |
| Method for checking and fixing double-patterning layout Grant 8,365,102 - Wang , et al. January 29, 2 | 2013-01-29 |
| Double Patterning Methodology App 20130024822 - Hsieh; Ken-Hsien ; et al. | 2013-01-24 |
| Systems And Methods For Creating Frequency-dependent Netlist App 20130014070 - SU; Ke-Ying ; et al. | 2013-01-10 |
| Routing system and method for double patterning technology Grant 8,239,806 - Chen , et al. August 7, 2 | 2012-08-07 |
| Double patterning technology using single-patterning-spacer-technique Grant 8,211,807 - Chen , et al. July 3, 2 | 2012-07-03 |
| Cell Layout for Multiple Patterning Technology App 20120167021 - Chen; Huang-Yu ; et al. | 2012-06-28 |
| Method And Apparatus For Achieving Multiple Patterning Technology Compliant Design Layout App 20120131528 - Chen; Huang-Yu ; et al. | 2012-05-24 |
| Double Patterning Technology Using Single-Patterning-Spacer-Technique App 20120091592 - Chen; Huang-Yu ; et al. | 2012-04-19 |
| Method For Checking And Fixing Double-patterning Layout App 20110296360 - WANG; Dio ; et al. | 2011-12-01 |
| Methods for Double-Patterning-Compliant Standard Cell Design App 20110193234 - Chen; Huang-Yu ; et al. | 2011-08-11 |
| Routing System And Method For Double Patterning Technology App 20110119648 - Chen; Huang-Yu ; et al. | 2011-05-19 |
| Chip-Level ECO Shrink App 20110072405 - Chen; Huang-Yu ; et al. | 2011-03-24 |
| Layout Decomposition Method Applicable To A Dual-pattern Lithography App 20110003254 - Chang; Yao-Wen ; et al. | 2011-01-06 |
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