Chen; Huajie

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chen; Huajie.The latest application filed is for "switching converter, and control method and control circuit thereof".

Company Profile

0.68.70

Chen; Huajie - Hangzhou CN
Chen; Huajie - Guangdong CN
Chen; Huajie - Danbury CT
Chen; Huajie - Zhuhai CN
Chen; Huajie - Wappingers Falls NY
Chen; Huajie - Mundelein IL
Chen, Huajie - US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Switching converter, and control method and control circuit thereof Grant 11,239,753 - Yu , et al. February 1, 2	2022-02-01
Switching Converter, And Control Method And Control Circuit Thereof App 20210211048 - Yu; Yongqiang ; et al.	2021-07-08
Motor and rotor thereof Grant 9,515,526 - Huang , et al. December 6, 2	2016-12-06
Motor rotor and motor having same Grant 9,502,934 - Huang , et al. November 22, 2	2016-11-22
Motor rotor and motor having same Grant 9,502,930 - Huang , et al. November 22, 2	2016-11-22
Permanent magnet synchronous electric machine Grant 9,502,933 - Huang , et al. November 22, 2	2016-11-22
High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture Grant 9,401,424 - Chen , et al. July 26, 2	2016-07-26
High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture Grant 9,023,698 - Chen , et al. May 5, 2	2015-05-05
High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture Grant 8,901,566 - Chen , et al. December 2, 2	2014-12-02
High Performance Stress-enhanced Mosfets Using Si:c And Sige Epitaxial Source/drain And Method Of Manufacture App 20140322873 - Chen; Huajie ; et al.	2014-10-30
Motor Rotor And Motor Having Same App 20140191607 - Huang; Hui ; et al.	2014-07-10
Motor And Rotor Thereof App 20140175932 - Huang; Hui ; et al.	2014-06-26
Motor Rotor And Motor Having Same App 20140167549 - Huang; Hui ; et al.	2014-06-19
Motor Rotor And Motor Having Same App 20140167550 - Huang; Hui ; et al.	2014-06-19
Permanent Magnet Synchronous Motor App 20140152139 - Huang; Hui ; et al.	2014-06-05
Permanent Magnet Synchronous Electric Machine App 20140145539 - Huang; Hui ; et al.	2014-05-29
High Performance Stress-enhanced Mosfets Using Si:c And Sige Epitaxial Source/drain And Method Of Manufacture App 20120196412 - CHEN; Huajie ; et al.	2012-08-02
High performance stress-enhanced MOSFETS using Si:C and SiGe epitaxial source/drain and method of manufacture Grant 8,168,489 - Chen , et al. May 1, 2	2012-05-01
Ultra shallow junction formation by epitaxial interface limited diffusion Grant 8,067,805 - Chen , et al. November 29, 2	2011-11-29
Ion implantation for suppression of defects in annealed SiGe layers Grant 8,053,759 - Bedell , et al. November 8, 2	2011-11-08
Hybrid SOI/bulk semiconductor transistors Grant 7,923,782 - Zhu , et al. April 12, 2	2011-04-12
Method of forming a cross-section hourglass shaped channel region for charge carrier mobility modification Grant 7,863,197 - Chen , et al. January 4, 2	2011-01-04
Metal oxide field effect transistor with a sharp halo Grant 7,859,013 - Chen , et al. December 28, 2	2010-12-28
Ultra shallow junction formation by epitaxial interface limited diffusion Grant 7,816,237 - Chen , et al. October 19, 2	2010-10-19
Defect reduction by oxidation of silicon Grant 7,816,664 - Bedell , et al. October 19, 2	2010-10-19
Embedded silicon germanium using a double buried oxide silicon-on-insulator wafer Grant 7,781,800 - Chen , et al. August 24, 2	2010-08-24
Hybrid SOI/bulk semiconductor transistors Grant 7,767,503 - Zhu , et al. August 3, 2	2010-08-03
Structure and method for reducing threshold voltage variation Grant 7,750,414 - Zhu , et al. July 6, 2	2010-07-06
Strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels Grant 7,723,791 - Zhu , et al. May 25, 2	2010-05-25
Structures and methods for manufacturing of dislocation free stressed channels in bulk silicon and SOI MOS devices by gate stress engineering with SiGe and/or Si:C Grant 7,713,806 - Zhu , et al. May 11, 2	2010-05-11
Pre-epitaxial disposable spacer integration scheme with very low temperature selective epitaxy for enhanced device performance Grant 7,682,915 - Chen , et al. March 23, 2	2010-03-23
High-quality SGOI by annealing near the alloy melting point Grant 7,679,141 - Bedell , et al. March 16, 2	2010-03-16
ION IMPLANTATION FOR SUPPRESSION OF DEFECTS IN ANNEALED SiGe LAYERS App 20100032684 - Bedell; Stephen W. ; et al.	2010-02-11
Structure and method for making strained channel field effect transistor using sacrificial spacer Grant 7,645,656 - Chen , et al. January 12, 2	2010-01-12
Method of forming thin SGOI wafers with high relaxation and low stacking fault defect density Grant 7,550,370 - Chen , et al. June 23, 2	2009-06-23
Method And Structure For Semiconductor Devices With Silicon-germanium Deposits App 20090152590 - Adam; Thomas N. ; et al.	2009-06-18
STRUCTURES AND METHODS FOR MANUFACTURING OF DISLOCATION FREE STRESSED CHANNELS IN BULK SILICON AND SOI MOS DEVICES BY GATE STRESS ENGINEERING WITH SiGe AND/OR Si:C App 20090149010 - Zhu; Huilong ; et al.	2009-06-11
Semiconductor heterostructure including a substantially relaxed, low defect density SiGe layer Grant 7,507,988 - Bedell , et al. March 24, 2	2009-03-24
Dislocation free stressed channels in bulk silicon and SOI CMOS devices by gate stress engineering Grant 7,504,693 - Zhu , et al. March 17, 2	2009-03-17
Structures and methods for manufacturing of dislocation free stressed channels in bulk silicon and SOI CMOS devices by gate stress engineering with SiGe and/or Si:C Grant 7,476,580 - Zhu , et al. January 13, 2	2009-01-13
Structure And Method For Manufacturing Strained Silicon Directly-on-insulator Substrate With Hybrid Crystalline Orientation And Different Stress Levels App 20080296634 - Zhu; Huilong ; et al.	2008-12-04
Hybrid SOI-bulk semiconductor transistors Grant 7,452,761 - Zhu , et al. November 18, 2	2008-11-18
Embedded silicon germanium using a double buried oxide silicon-on-insulator wafer Grant 7,446,350 - Chen , et al. November 4, 2	2008-11-04
Embedded Silicon Germanium Using A Double Buried Oxide Silicon-on-insulator Wafer App 20080265281 - Chen; Huajie ; et al.	2008-10-30
Cross-section Hourglass Shaped Channel Region For Charge Carrier Mobility Modification App 20080258180 - Chen; Huajie ; et al.	2008-10-23
Defect Reduction By Oxidation Of Silicon App 20080246019 - Bedell; Stephen W. ; et al.	2008-10-09
Hybrid Soi/bulk Semiconductor Transistors App 20080242069 - Zhu; Huilong ; et al.	2008-10-02
Ultra Shallow Junction Formation By Epitaxial Interface Limited Diffusion App 20080230840 - Chen; Huajie ; et al.	2008-09-25
Ultra Shallow Junction Formation By Epitaxial Interface Limited Diffusion App 20080233687 - Chen; Huajie ; et al.	2008-09-25
Strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels Grant 7,423,303 - Zhu , et al. September 9, 2	2008-09-09
Pre-epitaxial Disposable Spacer Integration Scheme With Very Low Temperature Selective Epitaxy For Enhanced Device Performance App 20080199998 - Chen; Huajie ; et al.	2008-08-21
Ultra shallow junction formation by epitaxial interface limited diffusion Grant 7,402,870 - Chen , et al. July 22, 2	2008-07-22
Method of making strained semiconductor transistors having lattice-mismatched semiconductor regions underlying source and drain regions Grant 7,396,714 - Chen , et al. July 8, 2	2008-07-08
Metal oxide field effect transistor with a sharp halo and a method of forming the transistor Grant 7,384,835 - Chen , et al. June 10, 2	2008-06-10
Pre-epitaxial disposable spacer integration scheme with very low temperature selective epitaxy for enhanced device performance Grant 7,381,623 - Chen , et al. June 3, 2	2008-06-03
High-quality Sgoi By Annealing Near The Alloy Melting Point App 20080116483 - Bedell; Stephen W. ; et al.	2008-05-22
Metal Oxide Field Effect Transistor With A Sharp Halo App 20080093629 - Chen; Huajie ; et al.	2008-04-24
Hybrid SOI-Bulk Semiconductor Transistors App 20080090366 - Zhu; Huilong ; et al.	2008-04-17
High-quality SGOI by annealing near the alloy melting point Grant 7,348,253 - Bedell , et al. March 25, 2	2008-03-25
STRUCTURES AND METHODS FOR MANUFACTURING OF DISLOCATION FREE STRESSED CHANNELS IN BULK SILICON AND SOI MOS DEVICES BY GATE STRESS ENGINEERING WITH SiGe AND/OR Si:C App 20080064197 - Zhu; Huilong ; et al.	2008-03-13
High Performance Stress-enhanced Mosfets Using Si:c And Sige Epitaxial Source/drain And Method Of Manufacture App 20070296038 - CHEN; Huajie ; et al.	2007-12-27
Buffer layer for selective SiGe growth for uniform nucleation Grant 7,309,660 - Chen December 18, 2	2007-12-18
High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture Grant 7,303,949 - Chen , et al. December 4, 2	2007-12-04
Metal Oxide Field Effect Transistor With A Sharp Halo And A Method Of Forming The Transistor App 20070275510 - Chen; Huajie ; et al.	2007-11-29
Method of making strained channel CMOS transistors having lattice-mismatched epitaxial Grant 7,297,583 - Chen , et al. November 20, 2	2007-11-20
High Performance Stress-enhanced Mosfets Using Si:c And Sige Epitaxial Source/drain And Method Of Manufacture App 20070264783 - CHEN; Huajie ; et al.	2007-11-15
Structure And Method For Manufacturing Strained Silicon Directly-on-insulator Substrate With Hybrid Crystalline Orientation And Different Stress Levels App 20070262361 - Zhu; Huilong ; et al.	2007-11-15
Method of making strained semiconductor transistors having lattice-mismatched semiconductor regions underlying source and drain regions Grant 7,291,528 - Chen , et al. November 6, 2	2007-11-06
Self-aligned mask formed utilizing differential oxidation rates of materials Grant 7,288,827 - Chen , et al. October 30, 2	2007-10-30
Method of making strained semiconductor transistors having lattice-mismatched semiconductor regions underlying source and drain regions App 20070249114 - Chen; Huajie ; et al.	2007-10-25
Method for manufacturing strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels Grant 7,271,043 - Zhu , et al. September 18, 2	2007-09-18
STRUCTURE AND METHOD FOR MANUFACTURING PLANAR STRAINED Si/SiGe SUBSTRATE WITH MULTIPLE ORIENTATIONS AND DIFFERENT STRESS LEVELS App 20070170507 - Zhu; Huilong ; et al.	2007-07-26
Method of forming strained silicon materials with improved thermal conductivity Grant 7,247,546 - Bedell , et al. July 24, 2	2007-07-24
Method of forming thin sgoi wafers with high relaxation and low stacking fault defect density App 20070128840 - Chen; Huajie ; et al.	2007-06-07
Structure and method for manufacturing planar strained Si/SiGe substrate with multiple orientations and different stress levels Grant 7,220,626 - Zhu , et al. May 22, 2	2007-05-22
Defect Reduction By Oxidation Of Silicon App 20070105350 - Bedell; Stephen W. ; et al.	2007-05-10
In situ doped embedded sige extension and source/drain for enhanced PFET performance Grant 7,176,481 - Chen , et al. February 13, 2	2007-02-13
Defect reduction by oxidation of silicon Grant 7,169,226 - Bedell , et al. January 30, 2	2007-01-30
Structure And Method For Making Strained Channel Field Effect Transistor Using Sacrificial Spacer App 20060292779 - Chen; Huajie ; et al.	2006-12-28
Embedded Silicon Germanium Using A Double Buried Oxide Silicon-on-insulator Wafer App 20060255330 - Chen; Huajie ; et al.	2006-11-16
Structure and method for making strained channel field effect transistor using sacrificial spacer Grant 7,135,724 - Chen , et al. November 14, 2	2006-11-14
STRUCTURE AND METHOD FOR MANUFACTURING PLANAR STRAINED Si/SiGe SUBSTRATE WITH MULTIPLE ORIENTATIONS AND DIFFERENT STRESS LEVELS App 20060172495 - Zhu; Huilong ; et al.	2006-08-03
Structure and method for manufacturing strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels App 20060157706 - Zhu; Huilong ; et al.	2006-07-20
LOW CONCENTRATION SiGe BUFFER DURING STRAINED Si GROWTH OF SSGOI MATERIAL FOR DOPANT DIFFUSION CONTROL AND DEFECT REDUCTION App 20060151787 - Chen; Huajie ; et al.	2006-07-13
In Situ Doped Embedded Sige Extension And Source/drain For Enhanced Pfet Performance App 20060151837 - Chen; Huajie ; et al.	2006-07-13
Chemical treatment to retard diffusion in a semiconductor overlayer Grant 7,071,103 - Chan , et al. July 4, 2	2006-07-04
Ultra Shallow Junction Formation By Epitaxial Interface Limited Diffusion App 20060076627 - Chen; Huajie ; et al.	2006-04-13
SiGe lattice engineering using a combination of oxidation, thinning and epitaxial regrowth Grant 7,026,249 - Bedell , et al. April 11, 2	2006-04-11
Structure And Method For Making Strained Channel Field Effect Transistor Using Sacrificial Spacer App 20060065914 - Chen; Huajie ; et al.	2006-03-30
Use of thin SOI to inhibit relaxation of SiGe layers App 20060057403 - Bedell; Stephen W. ; et al.	2006-03-16
Buffer layer for selective SiGe growth for uniform nucleation App 20060057859 - Chen; Huajie	2006-03-16
Method Of Forming Strained Silicon Materials With Improved Thermal Conductivity App 20060027808 - Bedell; Stephen W. ; et al.	2006-02-09
Chemical Treatment To Retard Diffusion In A Semiconductor Overlayer App 20060024934 - Chan; Kevin K. ; et al.	2006-02-02
Use of thin SOI to inhibit relaxation of SiGe layers Grant 6,989,058 - Bedell , et al. January 24, 2	2006-01-24
Ion implantation for suppression of defects in annealed SiGe layers App 20060011906 - Bedell; Stephen W. ; et al.	2006-01-19
Method of fabricating strained Si SOI wafers Grant 6,972,247 - Bedell , et al. December 6, 2	2005-12-06
STRUCTURES AND METHODS FOR MANUFACTURING OF DISLOCATION FREE STRESSED CHANNELS IN BULK SILICON AND SOI CMOS DEVICES BY GATE STRESS ENGINEERING WITH SiGe AND/OR Si:C App 20050236668 - Zhu, Huilong ; et al.	2005-10-27
Method of preventing surface roughening during hydrogen prebake of SiGe substrates Grant 6,958,286 - Chen , et al. October 25, 2	2005-10-25
Method of forming high-quality relaxed SiGe alloy layers on bulk Si substrates App 20050221591 - Bedell, Stephen W. ; et al.	2005-10-06
Hybrid Soi/bulk Semiconductor Transistors App 20050189589 - Zhu, Huilong ; et al.	2005-09-01
Thin channel FET with recessed source/drains and extensions Grant 6,924,517 - Chen , et al. August 2, 2	2005-08-02
Method of making strained semiconductor transistors having lattice-mismatched semiconductor regions underlying source and drain regions App 20050158931 - Chen, Huajie ; et al.	2005-07-21
High performance CMOS device structure with mid-gap metal gate Grant 6,916,698 - Mocuta , et al. July 12, 2	2005-07-12
Method of preventing surface roughening during hydrogen pre-bake of SiGe substrates using chlorine containing gases App 20050148162 - Chen, Huajie ; et al.	2005-07-07
Method of preventing surface roughening during hydrogen prebake of SiGe substrates App 20050148161 - Chen, Huajie ; et al.	2005-07-07
Structure and method of making strained channel CMOS transistors having lattice-mismatched epitaxial extension and source and drain regions Grant 6,906,360 - Chen , et al. June 14, 2	2005-06-14
Method of fabricating strained Si SOI wafers App 20050124146 - Bedell, Steven W. ; et al.	2005-06-09
Method of Forming strained SI/SIGE on insulator with silicon germanium buffer Grant 6,893,936 - Chen , et al. May 17, 2	2005-05-17
Structure and method of making strained semiconductor CMOS transistors having lattice-mismatched semiconductor regions underlying source and drain regions Grant 6,891,192 - Chen , et al. May 10, 2	2005-05-10
High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture App 20050082616 - Chen, Huajie ; et al.	2005-04-21
Self-aligned mask formed utilizing differential oxidation rates of materials App 20050079726 - Chen, Huajie ; et al.	2005-04-14
Structure And Method Of Making Strained Channel Cmos Transistors Having Lattice-mismatched Epitaxial Extension And Source And Drain Regions App 20050051851 - Chen, Huajie ; et al.	2005-03-10
Use of thin SOI to inhibit relaxation of SiGe layers App 20050048778 - Bedell, Stephen W. ; et al.	2005-03-03
Thin Channel Fet With Recessed Source/drains And Extensions App 20050045947 - Chen, Huajie ; et al.	2005-03-03
Structure And Method Of Making Strained Semiconductor Cmos Transistors Having Lattice-mismatched Source And Drain Regions App 20050029601 - Chen, Huajie ; et al.	2005-02-10
Self-aligned mask formed utilizing differential oxidation rates of materials Grant 6,844,225 - Chen , et al. January 18, 2	2005-01-18
Defect reduction by oxidation of silicon App 20050003229 - Bedell, Stephen W. ; et al.	2005-01-06
High-quality SGOI by annealing near the alloy melting point App 20040259334 - Bedell, Stephen W. ; et al.	2004-12-23
SiGe lattice engineering using a combination of oxidation, thinning and epitaxial regrowth App 20040242006 - Bedell, Stephen W. ; et al.	2004-12-02
High performance CMOS device structure with mid-gap metal gate App 20040171205 - Mocuta, Anda C. ; et al.	2004-09-02
BiCMOS integration scheme with raised extrinsic base Grant 6,780,695 - Chen , et al. August 24, 2	2004-08-24
Nitride pedestal for raised extrinsic base HBT process Grant 6,777,302 - Chen , et al. August 17, 2	2004-08-17
Self-aligned mask formed utilizing differential oxidation rates of materials App 20040137670 - Chen, Huajie ; et al.	2004-07-15
High performance CMOS device structure with mid-gap metal gate Grant 6,762,469 - Mocuta , et al. July 13, 2	2004-07-13
Method for improving CVD film quality utilizing polysilicon getterer Grant 6,749,684 - Chen , et al. June 15, 2	2004-06-15
High performance CMOS device structure with mid-gap metal gate App 20030197230 - Mocuta, Anda C. ; et al.	2003-10-23