CHEN; Guo Qing

Patent Applications and Registrations

Patent applications and USPTO patent grants for CHEN; Guo Qing.The latest application filed is for "hybrid integrated semiconductor tri-gate and split dual-gate finfet devices".

Company Profile

1.12.13

CHEN; Guo Qing - Shanghai CN
Chen; Guo Qing - Boise ID
Chen; Guo Qing - Shangahi CN

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Hybrid Integrated Semiconductor Tri-gate And Split Dual-gate Finfet Devices App 20210134675 - XIAO; Deyuan ; et al.	2021-05-06
Hybrid integrated semiconductor tri-gate and split dual-gate FinFET devices and method for manufacturing Grant 10,923,399 - Xiao , et al. February 16, 2	2021-02-16
Hybrid Integrated Semiconductor Tri-gate And Split Dual-gate Finfet Devices And Method For Manufacturing App 20180174909 - Xiao; De Yuan ; et al.	2018-06-21
Hybrid integrated semiconductor tri-gate and split dual-gate FinFET devices and method for manufacturing Grant 9,922,878 - Xiao , et al. March 20, 2	2018-03-20
System and method for integrated circuits with cylindrical gate structures Grant 9,673,060 - Xiao , et al. June 6, 2	2017-06-06
System And Method For Integrated Circuits With Cylindrical Gate Structures App 20160260621 - XIAO; DE YUAN ; et al.	2016-09-08
System and method for integrated circuits with cylindrical gate structures Grant 9,373,694 - Xiao , et al. June 21, 2	2016-06-21
System and method for integrated circuits with cylindrical gate structures Grant 9,224,812 - Xiao , et al. December 29, 2	2015-12-29
Hybrid integrated semiconductor tri-gate and split dual-gate FinFET devices and method for manufacturing Grant 9,202,762 - Xiao , et al. December 1, 2	2015-12-01
System And Method For Integrated Circuits With Cylindrical Gate Structures App 20150024559 - XIAO; DE YUAN ; et al.	2015-01-22
System and method for integrated circuits with cylindrical gate structures Grant 8,884,363 - Xiao , et al. November 11, 2	2014-11-11
Method and system for forming conductive bumping with copper interconnection Grant 8,581,366 - Xiao , et al. November 12, 2	2013-11-12
System And Method For Integrated Circuits With Cylindrical Gate Structures App 20130228833 - Xiao; De Yuan ; et al.	2013-09-05
Hybrid Integrated Semiconductor Tri-gate And Split Dual-gate Finfet Devices And Method For Manufacturing App 20130102116 - XIAO; DE YUAN ; et al.	2013-04-25
Method And System For Forming Conductive Bumping With Copper Interconnection App 20130029483 - XIAO; DE YUAN ; et al.	2013-01-31
Method and system for forming conductive bumping with copper interconnection Grant 8,293,635 - Xiao , et al. October 23, 2	2012-10-23
Method And System For Forming Conductive Bumping With Copper Interconnection App 20120088363 - XIAO; DE YUAN ; et al.	2012-04-12
Hybrid Integrated Semiconductor Tri-gate And Split Dual-gate Finfet Devices And Method For Manufacturing App 20120032732 - Xiao; DeYuan ; et al.	2012-02-09
System and method for integrated circuits with cylindrical gate structures App 20110291190 - Xiao; De Yuan ; et al.	2011-12-01
Method and system for forming conductive bumping with copper interconnection Grant 8,053,907 - Xiao , et al. November 8, 2	2011-11-08
Semiconductor Device With A 7f2 Cell Structure App 20110108889 - XING; SEAN ; et al.	2011-05-12
Method and System for Forming Conductive Bumping with Copper Interconnection App 20100013100 - Xiao; De Yuan ; et al.	2010-01-21

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