| Patent | Date |
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Methods of forming FinFET devices
Grant 11,152,249 - Lin , et al. October 19, 2 | 2021-10-19 |
Formation of silicide contacts in semiconductor devices
Grant 11,081,563 - Tsai , et al. August 3, 2 | 2021-08-03 |
Package structure and manufacturing method thereof
Grant 10,914,895 - Liao , et al. February 9, 2 | 2021-02-09 |
Semiconductor Package
App 20210005591 - Liao; Yu-Kuang ; et al. | 2021-01-07 |
Semiconductor package
Grant 10,797,031 - Liao , et al. October 6, 2 | 2020-10-06 |
Methods Of Forming Finfet Devices
App 20200312709 - Lin; Jih-Jse ; et al. | 2020-10-01 |
FinFET devices and methods of forming the same
Grant 10,658,225 - Lin , et al. | 2020-05-19 |
Semiconductor Package
App 20200098736 - Liao; Yu-Kuang ; et al. | 2020-03-26 |
Package Structure And Manufacturing Method Thereof
App 20200091124 - Liao; Yu-Kuang ; et al. | 2020-03-19 |
Finfet Devices And Methods Of Forming The Same
App 20190229010 - Lin; Jih-Jse ; et al. | 2019-07-25 |
Optical transceiver
Grant 10,333,623 - Liao , et al. | 2019-06-25 |
Semiconductor device and method for forming the same
Grant 9,653,594 - Tsai , et al. May 16, 2 | 2017-05-16 |
Semiconductor Device and Method for Forming the Same
App 20160163847 - Tsai; Wen-Chi ; et al. | 2016-06-09 |
Semiconductor device and method for forming the same
Grant 9,252,019 - Tsai , et al. February 2, 2 | 2016-02-02 |
Improved Formation Of Silicide Contacts In Semiconductor Devices
App 20150380509 - Tsai; Yan-Ming ; et al. | 2015-12-31 |
Formation of silicide contacts in semiconductor devices
Grant 9,129,842 - Tsai , et al. September 8, 2 | 2015-09-08 |
Formation Of Silicide Contacts In Semiconductor Devices
App 20150206881 - Tsai; Yan-Ming ; et al. | 2015-07-23 |
Semiconductor Device and Method for Forming the Same
App 20130049219 - Tsai; Wen-Chi ; et al. | 2013-02-28 |
Contact or via hole structure with enlarged bottom critical dimension
Grant 7,511,349 - Tsai , et al. March 31, 2 | 2009-03-31 |
Critical dimension control in a semiconductor fabrication process
Grant 7,306,746 - Chen , et al. December 11, 2 | 2007-12-11 |
Phosphoric acid free process for polysilicon gate definition
Grant 7,307,009 - Lin , et al. December 11, 2 | 2007-12-11 |
Method to control gate CD
Grant RE39,913 - Tao , et al. November 6, 2 | 2007-11-06 |
Necked Finfet device
App 20070063261 - CHEN; Haur-Ywh ; et al. | 2007-03-22 |
Contact or via hole structure with enlarged bottom critical dimension
App 20070040188 - Tsai; Ming-Huan ; et al. | 2007-02-22 |
Method of fabricating a necked FINFET device
Grant 7,122,412 - Chen , et al. October 17, 2 | 2006-10-17 |
Wet etchant composition and method for etching HfO2 and ZrO2
App 20060054597 - Perng; Baw-Ching ; et al. | 2006-03-16 |
Wet etchant composition and method for etching HfO2 and ZrO2
Grant 6,969,688 - Perng , et al. November 29, 2 | 2005-11-29 |
Method of fabricating a necked finfet device
App 20050253193 - Chen, Haur-Ywh ; et al. | 2005-11-17 |
Critical dimension control in a semiconductor fabrication process
App 20050167397 - Chen, Fang-Cheng ; et al. | 2005-08-04 |
Patterned microelectronic mask layer formation method employing multiple feed-forward linewidth measurement
App 20050136335 - Chen, Ryan Chia-Jen ; et al. | 2005-06-23 |
Novel gate structure and method of forming the gate dielectric with mini-spacer
App 20050127459 - Chiu, Yuan-Hung ; et al. | 2005-06-16 |
Method of forming a semiconductor device with a high dielectric constant material and an offset spacer
App 20050121733 - Chen, Fang-Cheng ; et al. | 2005-06-09 |
Method of forming offset spacer manufacturing for critical dimension precision
Grant 6,900,104 - Chen , et al. May 31, 2 | 2005-05-31 |
Thermal oxidation method for topographic feature corner rounding
App 20050095808 - Chiu, Hsien-Kuang ; et al. | 2005-05-05 |
Method of fabricating a MOSFET device with metal containing gate structures
Grant 6,869,868 - Chiu , et al. March 22, 2 | 2005-03-22 |
Gate structure and method of forming the gate dielectric with mini-spacer
Grant 6,867,084 - Chiu , et al. March 15, 2 | 2005-03-15 |
Method of making a gate electrode on a semiconductor device
App 20040266115 - Chan, Bor-Wen ; et al. | 2004-12-30 |
Dielectric plasma etch with deep uv resist and power modulation
App 20040253823 - Taq, Hun-Jan ; et al. | 2004-12-16 |
Sidewall polymer deposition method for forming a patterned microelectronic layer
Grant 6,828,237 - Chan , et al. December 7, 2 | 2004-12-07 |
Method of forming a shallow trench isolation region in strained silicon layer and in an underlying on silicon - germanium layer
App 20040209437 - Chiu, Hsien-Kuang ; et al. | 2004-10-21 |
Method Of Fabricating A Mosfet Device With Metal Containing Gate Structures
App 20040113171 - Chiu, Hsien-Kuang ; et al. | 2004-06-17 |
Wet etchant composition and method for etching HfO2 and ZrO2
App 20040067657 - Perng, Baw-Ching ; et al. | 2004-04-08 |
Hard mask trimming with thin hard mask layer and top protection layer
App 20030096465 - Chen, Cheng-Ku ; et al. | 2003-05-22 |
Top corner rounding for shallow trench isolation
Grant 6,265,317 - Chiu , et al. July 24, 2 | 2001-07-24 |
Method of patterning narrow gate electrode
Grant 6,174,818 - Tao , et al. January 16, 2 | 2001-01-16 |
Plasma etch method for forming metal-fluoropolymer residue free vias through silicon containing dielectric layers
Grant 6,051,505 - Chu , et al. April 18, 2 | 2000-04-18 |
Damage free passivation layer etching process
Grant 6,001,538 - Chen , et al. December 14, 1 | 1999-12-14 |
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