| Patent | Date |
|---|
Semiconductor Devices With Modified Source/Drain Feature And Methods Thereof
App 20220285561 - Lai; Wei-Jen ; et al. | 2022-09-08 |
Method for Improved Critical Dimension Uniformity in a Semiconductor Device Fabrication Process
App 20220223428 - Hung; Chi-Cheng ; et al. | 2022-07-14 |
Method for improved critical dimension uniformity in a semiconductor device fabrication process
Grant 11,289,338 - Hung , et al. March 29, 2 | 2022-03-29 |
Method of forming isolation layer
Grant 11,227,788 - Tsai , et al. January 18, 2 | 2022-01-18 |
Semiconductor device with multiple threshold voltage and method of fabricating the same
Grant 11,056,486 - Wang , et al. July 6, 2 | 2021-07-06 |
Method Of Forming A Vertical Device
App 20210050430 - CHEN; DE-FANG ; et al. | 2021-02-18 |
Self-aligned nanowire formation using double patterning
Grant 10,879,129 - Fu , et al. December 29, 2 | 2020-12-29 |
Vertical device having a protrusion structure
Grant 10,854,728 - Chen , et al. December 1, 2 | 2020-12-01 |
Method for Improved Critical Dimension Uniformity in a Semiconductor Device Fabrication Process
App 20200343097 - Hung; Chi-Cheng ; et al. | 2020-10-29 |
Method Of Forming Isolation Layer
App 20200335388 - TSAI; Teng-Chun ; et al. | 2020-10-22 |
Method of Forming an Integrated Circuit
App 20200312663 - Hsieh; Tzu-Yen ; et al. | 2020-10-01 |
Methods for improved critical dimension uniformity in a semiconductor device fabrication process
Grant 10,714,357 - Hung , et al. | 2020-07-14 |
Method of forming isolation layer
Grant 10,707,114 - Tsai , et al. | 2020-07-07 |
Method of forming an integrated circuit using a patterned mask layer
Grant 10,665,457 - Hsieh , et al. | 2020-05-26 |
Method Of Forming A Vertical Device
App 20200111887 - CHEN; DE-FANG ; et al. | 2020-04-09 |
Self-Aligned Nanowire Formation Using Double Patterning
App 20200083110 - Fu; Ching-Feng ; et al. | 2020-03-12 |
Self-aligned nanowire formation using double patterning
Grant 10,504,792 - Fu , et al. Dec | 2019-12-10 |
Vertical device having a protrusion source
Grant 10,505,014 - Chen , et al. Dec | 2019-12-10 |
Method of forming isolation layer
Grant 10,418,271 - Tsai , et al. Sept | 2019-09-17 |
Semiconductor Device With Multiple Threshold Voltage And Method Of Fabricating The Same
App 20190229118 - WANG; Li-Ting ; et al. | 2019-07-25 |
Semiconductor device and method of forming vertical structure
Grant 10,325,994 - Peng , et al. | 2019-06-18 |
Lithographic technique incorporating varied pattern materials
Grant 10,312,109 - Tseng , et al. | 2019-06-04 |
Gate structure
Grant 10,276,725 - Fu , et al. | 2019-04-30 |
Semiconductor device with multiple threshold voltage and method of fabricating the same
Grant 10,276,562 - Wang , et al. | 2019-04-30 |
Self-Aligned Nanowire Formation Using Double Patterning
App 20190122936 - Fu; Ching-Feng ; et al. | 2019-04-25 |
Self-aligned nanowire formation using double patterning
Grant 10,163,723 - Fu , et al. Dec | 2018-12-25 |
Method Of Forming Isolation Layer
App 20180350655 - TSAI; Teng-Chun ; et al. | 2018-12-06 |
Methods for Improved Critical Dimension Uniformity in a Semiconductor Device Fabrication Process
App 20180330960 - Hung; Chi-Cheng ; et al. | 2018-11-15 |
Lithographic Technique Incorporating Varied Pattern Materials
App 20180286698 - Tseng; Chin-Yuan ; et al. | 2018-10-04 |
Semiconductor Device And Method Of Forming Vertical Structure
App 20180240882 - PENG; Chih-Tang ; et al. | 2018-08-23 |
Method of Forming an Integrated Circuit
App 20180218904 - Hsieh; Tzu-Yen ; et al. | 2018-08-02 |
Methods for improved critical dimension uniformity in a semiconductor device fabrication process
Grant 10,032,639 - Hung , et al. July 24, 2 | 2018-07-24 |
Methods for fabricating vertical-gate-all-around transistor structures
Grant 10,026,658 - Tsai , et al. July 17, 2 | 2018-07-17 |
Lithographic technique incorporating varied pattern materials
Grant 9,991,132 - Tseng , et al. June 5, 2 | 2018-06-05 |
Method of making a silicide beneath a vertical structure
Grant 9,966,448 - Lin , et al. May 8, 2 | 2018-05-08 |
Semiconductor device and method of forming vertical structure
Grant 9,954,069 - Peng , et al. April 24, 2 | 2018-04-24 |
Tunnel field-effect transistor
Grant 9,941,394 - Tsai , et al. April 10, 2 | 2018-04-10 |
Method of forming an integrated circuit using a patterned mask layer
Grant 9,934,971 - Hsieh , et al. April 3, 2 | 2018-04-03 |
Nano wire structure and method for fabricating the same
Grant 9,911,661 - Fu , et al. March 6, 2 | 2018-03-06 |
Tunnel field-effect transistor
Grant 9,853,102 - Tsai , et al. December 26, 2 | 2017-12-26 |
Nano Wire Structure and Method for Fabricating the Same
App 20170365524 - Fu; Ching-Feng ; et al. | 2017-12-21 |
Methods For Improved Critical Dimension Uniformity In A Semiconductor Device Fabrication Process
App 20170345670 - Hung; Chi-Cheng ; et al. | 2017-11-30 |
Vertical structure having an etch stop over portion of the source
Grant 9,805,968 - Lin , et al. October 31, 2 | 2017-10-31 |
Nano wire structure and method for fabricating the same
Grant 9,741,621 - Fu , et al. August 22, 2 | 2017-08-22 |
Method of Forming an Integrated Circuit
App 20170236712 - Hsieh; Tzu-Yen ; et al. | 2017-08-17 |
Multi-line width pattern created using photolithography
Grant 9,733,570 - Tai , et al. August 15, 2 | 2017-08-15 |
Self-Aligned Nanowire Formation Using Double Patterning
App 20170229349 - Fu; Ching-Feng ; et al. | 2017-08-10 |
Method Of Forming A Vertical Device
App 20170200804 - CHEN; DE-FANG ; et al. | 2017-07-13 |
Iterative self-aligned patterning
Grant 9,685,332 - Chen , et al. June 20, 2 | 2017-06-20 |
Gate Structure
App 20170162720 - Fu; Ching-Feng ; et al. | 2017-06-08 |
Nano Wire Structure and Method for Fabricating the Same
App 20170154824 - Fu; Ching-Feng ; et al. | 2017-06-01 |
Vertical Structure and Method of Forming Semiconductor Device
App 20170154807 - Lin; Cheng-Tung ; et al. | 2017-06-01 |
Method of forming an integrated circuit using a patterned mask layer
Grant 9,640,398 - Hsieh , et al. May 2, 2 | 2017-05-02 |
Self-aligned nanowire formation using double patterning
Grant 9,633,907 - Fu , et al. April 25, 2 | 2017-04-25 |
Method of forming a vertical device
Grant 9,614,054 - Chen , et al. April 4, 2 | 2017-04-04 |
Method of forming channel of gate structure
Grant 9,590,090 - Fu , et al. March 7, 2 | 2017-03-07 |
Vertical structure and method of forming semiconductor device
Grant 9,577,093 - Lin , et al. February 21, 2 | 2017-02-21 |
Nano wire structure and method for fabricating the same
Grant 9,570,358 - Fu , et al. February 14, 2 | 2017-02-14 |
Semiconductor device having a low divot of alignment between a substrate and an isolation thereof and method of forming the same
Grant 9,520,296 - Chen , et al. December 13, 2 | 2016-12-13 |
Nano Wire Structure and Method for Fabricating the Same
App 20160343620 - Fu; Ching-Feng ; et al. | 2016-11-24 |
Vertical-gate-all-around devices and method of fabrication thereof
Grant 9,478,631 - Lin , et al. October 25, 2 | 2016-10-25 |
Lithographic Technique Incorporating Varied Pattern Materials
App 20160307769 - Tseng; Chin-Yuan ; et al. | 2016-10-20 |
Self-aligned multiple spacer patterning process
Grant 9,472,414 - Yang , et al. October 18, 2 | 2016-10-18 |
Method of forming shallow trench isolation and semiconductor device
Grant 9,460,956 - Chen , et al. October 4, 2 | 2016-10-04 |
Self-Aligned Multiple Spacer Patterning Process
App 20160240386 - Syun; Chan ; et al. | 2016-08-18 |
Nano wire structure and method for fabricating the same
Grant 9,412,614 - Fu , et al. August 9, 2 | 2016-08-09 |
Semiconductor Device And Method Of Forming Vertical Structure
App 20160211370 - PENG; CHIH-TANG ; et al. | 2016-07-21 |
Method Of Forming A Vertical Device
App 20160111523 - CHEN; DE-FANG ; et al. | 2016-04-21 |
Iterative Self-aligned Patterning
App 20160111297 - CHEN; DE-FANG ; et al. | 2016-04-21 |
Semiconductor device and method of forming vertical structure
Grant 9,318,447 - Peng , et al. April 19, 2 | 2016-04-19 |
Multi-line Width Pattern Created Using Photolithography
App 20160033871 - TAI; CHUN-LIANG ; et al. | 2016-02-04 |
Vertical Structure And Method Of Forming Semiconductor Device
App 20160027917 - LIN; CHENG-TUNG ; et al. | 2016-01-28 |
Semiconductor Device And Method Of Forming Vertical Structure
App 20160020180 - PENG; CHIH-TANG ; et al. | 2016-01-21 |
Method of forming a vertical device
Grant 9,224,833 - Chen , et al. December 29, 2 | 2015-12-29 |
Semiconductor Device And Method Of Forming Vertical Structure
App 20150364333 - CHEN; DE-FANG ; et al. | 2015-12-17 |
Method Of Forming Shallow Trench Isolation And Semiconductor Device
App 20150364360 - CHEN; DE-FANG ; et al. | 2015-12-17 |
Method Of Forming Isolation Layer
App 20150364358 - TSAI; TENG-CHUN ; et al. | 2015-12-17 |
Systems And Methods For Fabricating Vertical-gate-all-around Devices
App 20150357432 - LIN; CHENG-TUNG ; et al. | 2015-12-10 |
Nano Wire Structure and Method for Fabricating the Same
App 20150348796 - Fu; Ching-Feng ; et al. | 2015-12-03 |
Self-aligned Nanowire Formation Using Double Patterning
App 20150348848 - Fu; Ching-Feng ; et al. | 2015-12-03 |
Vertical Structure And Method Of Forming The Same
App 20150333152 - LIN; CHENG-TUNG ; et al. | 2015-11-19 |
Tunnel Field-effect Transistor And Method For Fabricating The Same
App 20150318213 - TSAI; Teng-Chun ; et al. | 2015-11-05 |
Tunnel Field-effect Transistor And Method For Fabrictaing The Same
App 20150318214 - TSAI; Teng-Chun ; et al. | 2015-11-05 |
Multi-line width pattern created using photolithography
Grant 9,176,388 - Tai , et al. November 3, 2 | 2015-11-03 |
Vertical structure and method of forming semiconductor device
Grant 9,166,001 - Lin , et al. October 20, 2 | 2015-10-20 |
Systems And Methods For Fabricating Vertical-gate-all-around Transistor Structures
App 20150295040 - TSAI; TENG-CHUN ; et al. | 2015-10-15 |
Method Of Forming An Integrated Circuit
App 20150243504 - HSIEH; Tzu-Yen ; et al. | 2015-08-27 |
Vertical Device And Method Of Forming The Same
App 20150228759 - CHEN; DE-FANG ; et al. | 2015-08-13 |
Vertical Structure And Method Of Forming Semiconductor Device
App 20150228718 - LIN; CHENG-TUNG ; et al. | 2015-08-13 |
Semiconductor Device With Multiple Threshold Voltage And Method Of Fabricating The Same
App 20150194423 - WANG; LI-TING ; et al. | 2015-07-09 |
Method Of Forming Channel Of Gate Structure
App 20150194497 - FU; CHING-FENG ; et al. | 2015-07-09 |
Method of forming an integrated circuit using a patterned mask layer
Grant 9,059,085 - Hsieh , et al. June 16, 2 | 2015-06-16 |
Multi-line Width Pattern Created Using Photolithography
App 20150125788 - TAI; CHUN-LIANG ; et al. | 2015-05-07 |
Method Of Forming An Integrated Circuit
App 20140295654 - HSIEH; Tzu-Yen ; et al. | 2014-10-02 |
Method of forming an integrated circuit
Grant 8,772,183 - Hsieh , et al. July 8, 2 | 2014-07-08 |
Method Of Forming An Integrated Circuit
App 20130102136 - HSIEH; Tzu-Yen ; et al. | 2013-04-25 |
Method of reducing a critical dimension of a semiconductor device
Grant 7,759,239 - Lin , et al. July 20, 2 | 2010-07-20 |
Poly Silicon Hard Mask
App 20080122107 - Tsai; Jang-Shiang ; et al. | 2008-05-29 |
H20 Plasma And H20 Vapor Methods For Releasing Charges
App 20060199393 - Lee; Yuan-Bang ; et al. | 2006-09-07 |
H2O plasma for simultaneous resist removal and charge releasing
App 20050287814 - Lee, Yuan-Bang ; et al. | 2005-12-29 |
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