Chen; Chao-Lung

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chen; Chao-Lung.The latest application filed is for "methods of fabricating semiconductor devices having conductive pad structures with multi-barrier films".

Company Profile

2.4.6

Chen; Chao-Lung - Tainan TW
CHEN; Chao-Lung - Tainan City TW
Chen; Chao-Lung - Hsin-Chu TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Plating apparatus and method for electroplating wafer Grant 11,401,624 - Lin , et al. August 2, 2	2022-08-02
Methods Of Fabricating Semiconductor Devices Having Conductive Pad Structures With Multi-barrier Films App 20220238467 - HUANG; Po-Hsun ; et al.	2022-07-28
Methods of fabricating semiconductor devices having conductive pad structures with multi-barrier films Grant 11,309,265 - Huang , et al. April 19, 2	2022-04-19
Plating Apparatus And Method For Electroplating Wafer App 20220025540 - Lin; Che-Min ; et al.	2022-01-27
Methods Of Fabricating Semiconductor Devices Having Conductive Pad Structures With Multi-barrier Films App 20200035628 - HUANG; Po-Hsun ; et al.	2020-01-30
Copper plating of semiconductor devices using single intermediate low power immersion step Grant 7,312,149 - Chen , et al. December 25, 2	2007-12-25
Electropolishing method for removing particles from wafer surface Grant 7,128,821 - Lin , et al. October 31, 2	2006-10-31
Method for forming a metal layer in multiple steps App 20060237320 - Lin; K.Y. ; et al.	2006-10-26
Copper plating of semiconductor devices using intermediate immersion step App 20050250327 - Chen, Chao-Lung ; et al.	2005-11-10
Electropolishing method for removing particles from wafer surface App 20050155869 - Lin, Shih-Ho ; et al.	2005-07-21

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