Chelcea; Tiberiu
Patent Applications and Registrations
Patent applications and USPTO patent grants for Chelcea; Tiberiu.The latest application filed is for "low latency fifo circuits for mixed asynchronous and synchronous systems".
- Chelcea; Tiberiu - New York NY
| Patent | Date |
|---|---|
| Low latency FIFO circuit for mixed clock systems Grant 7,197,582 - Chelcea , et al. March 27, 2 | 2007-03-27 |
| Low latency FIFO circuits for mixed asynchronous and synchronous systems Grant 6,850,092 - Chelcea , et al. February 1, 2 | 2005-02-01 |
| Low latency fifo circuit for mixed clock systems App 20040125665 - Chelcea, Tiberiu ; et al. | 2004-07-01 |
| Low latency fifo circuits for mixed asynchronous and synchronous systems App 20040128413 - Chelcea, Tiberiu ; et al. | 2004-07-01 |
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