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Patent applications and USPTO patent grants for Chejlava, Jr.; Edward J..The latest application filed is for "method and apparatus for implementing a dma timeout counter feature".
Patent | Date |
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Method and apparatus for implementing a DMA timeout counter feature Grant 5,826,107 - Cline , et al. October 20, 1 | 1998-10-20 |
Translating from a PIO protocol to DMA protocol with a peripheral interface circuit Grant 5,630,171 - Chejlava, Jr. , et al. May 13, 1 | 1997-05-13 |
Interface circuit for transferring data between host and mass storage by assigning address in the host memory space and placing the address on the bus Grant 5,603,052 - Chejlava, Jr. , et al. February 11, 1 | 1997-02-11 |
Interface circuit for transferring data between host device and mass storage device in response to designated address in host memory space assigned as data port Grant 5,592,682 - Chejlava, Jr. , et al. January 7, 1 | 1997-01-07 |
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