Cheah; Ken Cheong

Patent Applications and Registrations

Patent applications and USPTO patent grants for Cheah; Ken Cheong.The latest application filed is for "automated tests for built-in self test".

Company Profile

0.14.2

Cheah; Ken Cheong - Penang MY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Input of test conditions and output generation for built-in self test Grant 7,672,803 - Lee , et al. March 2, 2	2010-03-02
Page.sub.--EXE erase algorithm for flash memory Grant 7,415,646 - Lee , et al. August 19, 2	2008-08-19
Automated tests for built-in self test Grant 7,284,167 - Lee , et al. October 16, 2	2007-10-16
Flexible latency in flash memory Grant 7,158,442 - Beh , et al. January 2, 2	2007-01-02
Automated tests for built-in self test App 20060168491 - Lee; Mimi ; et al.	2006-07-27
Diagnostic mode for testing functionality of BIST (built-in-self-test) back-end state machine Grant 7,028,240 - Bautista, Jr. , et al. April 11, 2	2006-04-11
Address sequencer within BIST (Built-in-Self-Test) system Grant 7,010,736 - Teh , et al. March 7, 2	2006-03-07
Memory device and method Grant 6,980,473 - Bautista, Jr. , et al. December 27, 2	2005-12-27
Memory device and method Grant 6,973,003 - Salleh , et al. December 6, 2	2005-12-06
CAM (content addressable memory) cells as part of core array in flash memory device Grant 6,970,368 - Bautista, Jr. , et al. November 29, 2	2005-11-29
System and method for erase voltage control during multiple sector erase of a flash memory device Grant 6,891,752 - Bautista , et al. May 10, 2	2005-05-10
Implementing reference current measurement mode within reference array programming mode or reference array erase mode in a semiconductor Grant 6,771,093 - Bautista, Jr. , et al. August 3, 2	2004-08-03
Generation of margining voltage on-chip during testing CAM portion of flash memory device Grant 6,707,718 - Halim , et al. March 16, 2	2004-03-16
Built-in-self-test (BIST) of flash memory cells and implementation of BIST interface App 20040049724 - Bill, Colin ; et al.	2004-03-11
On-chip erase pulse counter for efficient erase verify BIST (built-in-self-test) mode Grant 6,665,214 - Cheah , et al. December 16, 2	2003-12-16
On-chip repair of defective address of core flash memory cells Grant 6,631,086 - Bill , et al. October 7, 2	2003-10-07

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