Chavali; Sri Chaitra J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chavali; Sri Chaitra J..The latest application filed is for "package with underfill containment barrier".

Company Profile

7.9.10

Chavali; Sri Chaitra J. - Chandler AZ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Ultra-thin, hyper-density semiconductor packages Grant 11,430,724 - Mallik , et al. August 30, 2	2022-08-30
Formation of tall metal pillars using multiple photoresist layers Grant 11,393,762 - Chavali , et al. July 19, 2	2022-07-19
Antenna package using ball attach array to connect antenna and base substrates Grant 11,355,849 - Yao , et al. June 7, 2	2022-06-07
Thermally coupled package-on-package semiconductor packages Grant 11,222,877 - Karhade , et al. January 11, 2	2022-01-11
Package With Underfill Containment Barrier App 20210391232 - Jain; Rahul ; et al.	2021-12-16
Package with underfill containment barrier Grant 11,158,558 - Jain , et al. October 26, 2	2021-10-26
Package With Underfill Containment Barrier App 20210111088 - Jain; Rahul ; et al.	2021-04-15
Antenna Package Using Ball Attach Array To Connect Antenna And Base Substrates App 20200303822 - YAO; Jimin ; et al.	2020-09-24
Ultra-thin, Hyper-density Semiconductor Packages App 20200273784 - MALLIK; Debendra ; et al.	2020-08-27
Formation Of Tall Metal Pillars Using Multiple Photoresist Layers App 20190326222 - Chavali; Sri Chaitra J. ; et al.	2019-10-24
Methods for forming a substrate structure for an electrical component and an apparatus for applying pressure to an electrically insulating laminate located on a core substrate Grant 10,384,431 - Park , et al. A	2019-08-20
Tin-zinc microbump structures and method of making same Grant 10,373,900 - Chavali , et al.	2019-08-06
Thermally Coupled Package-on-package Semiconductor App 20190103385 - KARHADE; OMKAR ; et al.	2019-04-04
Methods for forming a substrate structure for an electrical component and an apparatus for applying pressure to an electrically insulating laminate located on a core substrate App 20180281374 - Park; Ji Yong ; et al.	2018-10-04
Tin-zinc Microbump Structures And Method Of Making Same App 20180076119 - Chavali; Sri Chaitra J. ; et al.	2018-03-15
Tin-zinc microbump structures Grant 9,837,341 - Chavali , et al. December 5, 2	2017-12-05
Integrated Circuit Surface Layer With Adhesion-functional Group App 20170301619 - Alur; Siddharth K. ; et al.	2017-10-19
Integrated circuit surface layer with adhesion-functional group Grant 9,728,500 - Alur , et al. August 8, 2	2017-08-08
Integrated Circuit Surface Layer With Adhesion-functional Group App 20170179019 - Alur; Siddharth K. ; et al.	2017-06-22

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