Chauvel; Gerard

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chauvel; Gerard.The latest application filed is for "method and system for performing a java interrupt".

Company Profile

0.109.93

Chauvel; Gerard - Antibes N/A FR
Chauvel; Gerard - 06600 Antibes FR
Chauvel; Gerard - Cagnes/Mer FR
Chauvel; Gerard - Cagnes FR
Chauvel; Gerard - Cagnes-sur-Mer FR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and system of accessing display window memory Grant 8,782,675 - Chauvel , et al. July 15, 2	2014-07-15
Dirty cache line write back policy based on stack size trend information Grant 8,539,159 - Chauvel , et al. September 17, 2	2013-09-17
Performing java interrupt with two program counters Grant 8,516,502 - Chauvel , et al. August 20, 2	2013-08-20
Storing contexts for thread switching Grant 8,516,496 - Cabillic , et al. August 20, 2	2013-08-20
Mobile electronic device having a host processor system capable of dynamically canging tasks performed by a coprocessor in the device Grant 8,489,860 - McMahon , et al. July 16, 2	2013-07-16
Multi-processor computing system having a JAVA stack machine and a RISC-based processor Grant 8,429,383 - Chauvel , et al. April 23, 2	2013-04-23
Micro-sequence based security model Grant 8,190,861 - Chauvel , et al. May 29, 2	2012-05-29
Compare instruction Grant 8,185,666 - Chauvel May 22, 2	2012-05-22
Removing local RAM size limitations when executing software code Grant 8,078,842 - Cabillic , et al. December 13, 2	2011-12-13
Method and system to emulate an M-bit instruction set Grant 8,046,748 - Cabillic , et al. October 25, 2	2011-10-25
Energy-aware scheduling of application execution Grant 8,032,891 - Chauvel , et al. October 4, 2	2011-10-04
Modifying an instruction stream using one or more bits to replace an instruction or to replace an instruction and to subsequently execute the replaced instruction Grant 8,024,554 - Chauvel September 20, 2	2011-09-20
Data processing apparatus, system and method Grant 7,941,790 - Cabillic , et al. May 10, 2	2011-05-10
Method and system for accessing indirect memories Grant 7,930,689 - Cabillic , et al. April 19, 2	2011-04-19
Test and skip processor instruction having at least one register operand Grant 7,840,784 - Chauvel , et al. November 23, 2	2010-11-23
Mixed stack-based RISC processor Grant 7,840,782 - Chauvel , et al. November 23, 2	2010-11-23
Method and system to construct a data-flow analyzer for a bytecode verifier Grant 7,757,223 - Cabillic , et al. July 13, 2	2010-07-13
Pre-decoding bytecode prefixes selectively incrementing stack machine program counter Grant 7,757,067 - Chauvel , et al. July 13, 2	2010-07-13
Method and system for implementing an interrupt handler Grant 7,743,384 - Cabillic , et al. June 22, 2	2010-06-22
Tasks distribution in a multi-processor including a translation lookaside buffer shared between processors Grant 7,716,673 - Chauvel , et al. May 11, 2	2010-05-11
Data transfer controlled by task attributes Grant 7,712,098 - Chauvel , et al. May 4, 2	2010-05-04
Stack register reference control bit in source operand of instruction Grant 7,634,643 - Chauvel , et al. December 15, 2	2009-12-15
Method and system of control flow graph construction Grant 7,624,382 - Chauvel , et al. November 24, 2	2009-11-24
Method and system for processing a "WIDE" opcode when it is not used as a prefix for an immediately following opcode Grant 7,587,583 - Chauvel September 8, 2	2009-09-08
Splitting execution of a floating-point add instruction between an integer pipeline for performing mantissa addition and a hardware state machine Grant 7,574,584 - Chauvel , et al. August 11, 2	2009-08-11
Embedded garbage collection Grant 7,565,385 - Chauvel , et al. July 21, 2	2009-07-21
Memory management of local variables upon a change of context Grant 7,555,611 - Lasserre , et al. June 30, 2	2009-06-30
Saturated arithmetic in a processing unit Grant 7,543,014 - Chauvel , et al. June 2, 2	2009-06-02
Automatic operand load, modify and store Grant 7,533,250 - Chauvel , et al. May 12, 2	2009-05-12
Unified memory management system for multi processor heterogeneous architecture Grant 7,509,391 - Chauvel , et al. March 24, 2	2009-03-24
Reformat logic to translate between a virtual address and a compressed physical address Grant 7,506,131 - Chauvel March 17, 2	2009-03-17
Identifying code for compilation Grant 7,500,085 - Chauvel March 3, 2	2009-03-03
Accessing device driver memory in programming language representation Grant 7,496,930 - Chauvel , et al. February 24, 2	2009-02-24
Method and system for obtaining an immediate operand of a bytecode for use by a micro-sequence Grant 7,493,476 - Chauvel , et al. February 17, 2	2009-02-17
Inter-processor control Grant 7,434,029 - Chauvel , et al. October 7, 2	2008-10-07
Memory allocation in a multi-processor system Grant 7,434,021 - Chauvel , et al. October 7, 2	2008-10-07
System to dispatch several instructions on available hardware resources Grant 7,395,413 - Chauvel July 1, 2	2008-07-01
Conditional garbage based on monitoring to improve real time performance Grant 7,392,269 - Chauvel June 24, 2	2008-06-24
Smart cache Grant 7,386,671 - Chauvel , et al. June 10, 2	2008-06-10
Micro-Sequence Based Security Model App 20080134322 - Chauvel; Gerard ; et al.	2008-06-05
Method And System For Performing A Java Interrupt App 20080134212 - Chauvel; Gerard ; et al.	2008-06-05
Method And System Of Accessing Display Window Memory App 20080127048 - Chauvel; Gerard ; et al.	2008-05-29
Using IMPDEP2 for system commands related to Java accelerator hardware Grant 7,360,060 - Chauvel , et al. April 15, 2	2008-04-15
Management of stack-based memory usage in a processor Grant 7,330,937 - Chauvel , et al. February 12, 2	2008-02-12
Transport packet parser Grant 7,295,576 - Chauvel November 13, 2	2007-11-13
Address space priority arbitration Grant 7,266,824 - Chauvel September 4, 2	2007-09-04
Cache memory usable as scratch pad storage Grant 7,260,682 - Lesot , et al. August 21, 2	2007-08-21
Memory management of local variables Grant 7,203,797 - Chauvel , et al. April 10, 2	2007-04-10
Multiple processor cellular radio Grant 7,197,623 - Chauvel , et al. March 27, 2	2007-03-27
Temperature field controlled scheduling for processing systems Grant 7,174,194 - Chauvel , et al. February 6, 2	2007-02-06
Synchronizing stack storage Grant 7,162,586 - Chauvel , et al. January 9, 2	2007-01-09
JAVA DSP acceleration by byte-code optimization Grant 7,146,613 - Chauvel , et al. December 5, 2	2006-12-05
Priority arbitration based on current task and MMU Grant 7,120,715 - Chauvel , et al. October 10, 2	2006-10-10
System and method for executing tasks according to a selected scenario in response to probabilistic power consumption information of each scenario Grant 7,111,177 - Chauvel , et al. September 19, 2	2006-09-19
System and method to automatically stack and unstack Java local variables Grant 7,069,415 - Chauvel , et al. June 27, 2	2006-06-27
Task based adaptative profiling and debugging Grant 7,062,304 - Chauvel , et al. June 13, 2	2006-06-13
Processor with a split stack Grant 7,058,765 - Chauvel , et al. June 6, 2	2006-06-06
Protocol processor intended for the execution of a collection of instructions in a reduced number of operations Grant 7,028,145 - Chauvel , et al. April 11, 2	2006-04-11
Cache coherency in a multi-processor system Grant 6,996,683 - Chauvel , et al. February 7, 2	2006-02-07
Method and system of informing a micro-sequence of operand width App 20060026392 - Cabillic; Gilbert ; et al.	2006-02-02
Pack instruction App 20060026397 - Cabillic; Gilbert ; et al.	2006-02-02
Method and system for implementing an interrupt handler App 20060026565 - Cabillic; Gilbert ; et al.	2006-02-02
Storing contexts for thread switching App 20060026390 - Cabillic; Gilbert ; et al.	2006-02-02
Compare instruction App 20060026403 - Chauvel; Gerard	2006-02-02
Interrupt management in dual core processors App 20060026322 - Chauvel; Gerard ; et al.	2006-02-02
Method and system for accessing indirect memories App 20060026370 - Cabillic; Gilbert ; et al.	2006-02-02
Optimizing data manipulation in media processing applications App 20060026394 - Chauvel; Gerard	2006-02-02
Automatic operand load, modify and store App 20060026400 - Chauvel; Gerard ; et al.	2006-02-02
Identifying code for compilation App 20060026405 - Chauvel; Gerard	2006-02-02
Compare instruction App 20060026395 - Chauvel; Gerard	2006-02-02
Delegating tasks between multiple processor cores App 20060026407 - Chauvel; Gerard	2006-02-02
Method and system of using a "WIDE" opcode other than prefix App 20060026402 - Chauvel; Gerard	2006-02-02
Memory access instruction with optional error check App 20060026396 - Lesot; Jean-Philippe ; et al.	2006-02-02
Automatic operand load and store App 20060026391 - Chauvel; Gerard ; et al.	2006-02-02
Emulating a direct memory access controller App 20060026312 - Chauvel; Gerard	2006-02-02
Method and system of control flow graph construction App 20060026571 - Cabillic; Gilbert ; et al.	2006-02-02
Method and system to construct a data-flow analyzer for a bytecode verfier App 20060026404 - Cabillic; Gilbert ; et al.	2006-02-02
Removing local RAM size limitations when executing software code App 20060026412 - Cabillic; Gilbert ; et al.	2006-02-02
Cache memory usable as scratch pad storage App 20060026354 - Lesot; Jean-Philippe ; et al.	2006-02-02
Splitting execution of instructions between hardware and software App 20060026393 - Chauvel; Gerard ; et al.	2006-02-02
Unpack instruction App 20060026398 - Cabillic; Gilbert ; et al.	2006-02-02
Method and system to disable the "wide" prefix App 20060026401 - Chauvel; Gerard	2006-02-02
Method and system to emulate an M-bit instruction set App 20060025986 - Cabillic; Gilbert ; et al.	2006-02-02
TLB lock and unlock operation Grant 6,957,315 - Chauvel October 18, 2	2005-10-18
Traffic controller using priority and burst control for reducing access latency Grant 6,934,820 - Chauvel , et al. August 23, 2	2005-08-23
Dynamic hardware control for energy management systems using task attributes Grant 6,901,521 - Chauvel , et al. May 31, 2	2005-05-31
Dynamic hardware configuration for energy management systems using task attributes Grant 6,889,330 - Chauvel , et al. May 3, 2	2005-05-03
Dynamically changing the semantic of an instruction App 20050033945 - Chauvel, Gerard ; et al.	2005-02-10
Saturated arithmetic in a processing unit App 20050027774 - Chauvel, Gerard ; et al.	2005-02-03
Fault management and recovery based on task-ID Grant 6,851,072 - Lasserre , et al. February 1, 2	2005-02-01
TLB operations based on shared bit Grant 6,839,813 - Chauvel January 4, 2	2005-01-04
Memory allocation in a multi-processor system App 20040268076 - Chauvel, Gerard ; et al.	2004-12-30
Accessing device driver memory in programming language representation App 20040261085 - Chauvel, Gerard ; et al.	2004-12-23
Embedded garbage collection App 20040260732 - Chauvel, Gerard ; et al.	2004-12-23
Management of stack-based memory usage in a processor App 20040260904 - Chauvel, Gerard ; et al.	2004-12-23
Smart cache App 20040260881 - Chauvel, Gerard ; et al.	2004-12-23
Unresolved instruction resolution App 20040260911 - Chauvel, Gerard ; et al.	2004-12-23
Smart cache Grant 6,826,652 - Chauvel , et al. November 30, 2	2004-11-30
Cache with multiple fill modes Grant 6,792,508 - Chauvel , et al. September 14, 2	2004-09-14
Cache and DMA with a global valid bit Grant 6,789,172 - Chauvel , et al. September 7, 2	2004-09-07
Reformat logic to translate between a virtual address and a compressed physical address App 20040162954 - Chauvel, Gerard	2004-08-19
TLB operation based on task-ID Grant 6,779,085 - Chauvel August 17, 2	2004-08-17
Test and skip processor instruction having at least one register operand App 20040153885 - Chauvel, Gerard ; et al.	2004-08-05
Interruptible an re-entrant cache clean range instruction Grant 6,772,326 - Chauvel , et al. August 3, 2	2004-08-03
Cache with selective write allocation Grant 6,769,052 - Chauvel , et al. July 27, 2	2004-07-27
Fast hardware looping mechanism for cache cleaning and flushing of cache entries corresponding to a qualifier field Grant 6,766,421 - Lasserre , et al. July 20, 2	2004-07-20
MMU descriptor having big/little endian bit to control the transfer data between devices Grant 6,760,829 - Lasserre , et al. July 6, 2	2004-07-06
Cache with DMA and dirty bits Grant 6,754,781 - Chauvel , et al. June 22, 2	2004-06-22
Multiple microprocessors with a shared cache Grant 6,751,706 - Chauvel , et al. June 15, 2	2004-06-15
Level 2 smartcache architecture supporting simultaneous multiprocessor accesses Grant 6,745,293 - Lasserre , et al. June 1, 2	2004-06-01
Processing system with shared translation lookaside buffer Grant 6,742,103 - Chauvel , et al. May 25, 2	2004-05-25
Master/slave processing system with shared translation lookaside buffer Grant 6,742,104 - Chauvel , et al. May 25, 2	2004-05-25
TLB with resource ID field Grant 6,738,888 - Chauvel May 18, 2	2004-05-18
Level 2 cache architecture for multiprocessor with task--ID and resource--ID Grant 6,738,864 - Chauvel May 18, 2	2004-05-18
Inter-processor control App 20040088524 - Chauvel, Gerard ; et al.	2004-05-06
Cache operation based on range of addresses Grant 6,728,838 - Chauvel , et al. April 27, 2	2004-04-27
Synchronizing stack storage App 20040078531 - Chauvel, Gerard ; et al.	2004-04-22
Multi-processor computing system having a JAVA stack machine and a RISC-based processor App 20040078550 - Chauvel, Gerard ; et al.	2004-04-22
Memory management of local variables App 20040078523 - Chauvel, Gerard ; et al.	2004-04-22
Processor with a split stack App 20040078557 - Chauvel, Gerard ; et al.	2004-04-22
Cache coherency in a multi-processor system App 20040078528 - Chauvel, Gerard ; et al.	2004-04-22
Memory management of local variables upon a change of context App 20040078522 - Lasserre, Serge ; et al.	2004-04-22
Program counter adjustment based on the detection of an instruction prefix App 20040078552 - Chauvel, Gerard ; et al.	2004-04-22
System and method to automatically stack and unstack java local variables App 20040059893 - Chauvel, Gerard ; et al.	2004-03-25
Cache with block prefetch and DMA Grant 6,697,916 - Lasserre , et al. February 24, 2	2004-02-24
Concurrent task execution in a multi-processor, single operating system environment App 20040025161 - Chauvel, Gerard ; et al.	2004-02-05
Write back policy for memory App 20040024792 - Chauvel, Gerard ; et al.	2004-02-05
Mixed stack-based RISC processor App 20040024989 - Chauvel, Gerard ; et al.	2004-02-05
Methods and apparatuses for managing memory App 20040024970 - Chauvel, Gerard ; et al.	2004-02-05
Test with immediate and skip processor instruction App 20040024997 - Chauvel, Gerard ; et al.	2004-02-05
Synchronization of processor states App 20040024988 - Chauvel, Gerard ; et al.	2004-02-05
Conditional garbage based on monitoring to improve real time performance App 20040024798 - Chauvel, Gerard	2004-02-05
Processor that accommodates multiple instruction sets and multiple decode modes App 20040024990 - Chauvel, Gerard ; et al.	2004-02-05
Micro-sequence execution in a processor App 20040024999 - Chauvel, Gerard ; et al.	2004-02-05
Methods and apparatuses for managing memory App 20040024969 - Chauvel, Gerard ; et al.	2004-02-05
Using IMPDEP2 for system commands related to Java accelator hardware App 20040024991 - Chauvel, Gerard ; et al.	2004-02-05
Transport packet parser App 20040017821 - Chauvel, Gerard	2004-01-29
Task based priority arbitration Grant 6,684,280 - Chauvel , et al. January 27, 2	2004-01-27
Software controlled cache configuration based on average miss rate Grant 6,681,297 - Chauvel , et al. January 20, 2	2004-01-20
Application execution profiling in conjunction with a virtual machine App 20040010785 - Chauvel, Gerard ; et al.	2004-01-15
Cache/smartcache with interruptible block prefetch Grant 6,678,797 - Chauvel , et al. January 13, 2	2004-01-13
Energy-aware scheduling of application execution App 20030217090 - Chauvel, Gerard ; et al.	2003-11-20
Transport packet parser Grant 6,621,817 - Chauvel September 16, 2	2003-09-16
Optimized hardware cleaning function for VIVT data cache Grant 6,606,687 - Chauvel , et al. August 12, 2	2003-08-12
JAVA DSP acceleration by byte-code optimization App 20030101208 - Chauvel, Gerard ; et al.	2003-05-29
Cache with selective write allocation App 20030101320 - Chauvel, Gerard ; et al.	2003-05-29
Interruptible and re-entrant cache clean range instruction App 20030097550 - Chauvel, Gerard ; et al.	2003-05-22
Data transfer controlled by task attributes App 20030097394 - Chauvel, Gerard ; et al.	2003-05-22
Data processing apparatus, system and method App 20030079213 - Cabillic, Gilbert ; et al.	2003-04-24
Traffic controller using priority and burst control for reducing access latency App 20020194441 - Chauvel, Gerard ; et al.	2002-12-19
Method and apparatus for providing and on-screen display with variable resolution capability Grant 6,452,641 - Chauvel , et al. September 17, 2	2002-09-17
Device for identifying packets of digital data and a receiver for digital television signals equipped with such a device Grant 6,414,726 - Chauvel July 2, 2	2002-07-02
Task based priority arbitration App 20020083251 - Chauvel, Gerard ; et al.	2002-06-27
Traffic controller using priority and burst control for reducing access latency Grant 6,412,048 - Chauvel , et al. June 25, 2	2002-06-25
Digital Signal Processor With Direct And Virtual Addressing App 20020078319 - CHAUVEL, GERARD ; et al.	2002-06-20
Multiple microprocessors with a shared cache App 20020073282 - Chauvel, Gerard ; et al.	2002-06-13
Cache and DMA with a global valid bit App 20020069332 - Chauvel, Gerard ; et al.	2002-06-06
Multilevel cache architecture and data transfer App 20020069341 - Chauvel, Gerard ; et al.	2002-06-06
MMU descriptor having big/little endian bit to control the transfer data between devices App 20020069339 - Lasserre, Serge ; et al.	2002-06-06
Cache with DMA and dirty bits App 20020069330 - Chauvel, Gerard ; et al.	2002-06-06
Cache operation based on range of addresses App 20020069331 - Chauvel, Gerard ; et al.	2002-06-06
TLB with resource ID field App 20020069328 - Chauvel, Gerard	2002-06-06
TLB lock and unlock operation App 20020069327 - Chauvel, Gerard	2002-06-06
Cache/smartcache with interruptible block prefetch App 20020065990 - Chauvel, Gerard ; et al.	2002-05-30
Level 2 cache architecture for multiprocessor with task_ID and resource_ID App 20020065979 - Chauvel, Gerard	2002-05-30
Master/slave processing system with shared translation lookaside buffer App 20020065989 - Chauvel, Gerard ; et al.	2002-05-30
Temperature field controlled scheduling for processing systems App 20020065049 - Chauvel, Gerard ; et al.	2002-05-30
Software controlled cache configuration based on average miss rate App 20020065992 - Chauvel, Gerard ; et al.	2002-05-30
Level 2 smartcache architecture supporting simultaneous multiprocessor accesses App 20020065988 - Lasserre, Serge ; et al.	2002-05-30
TLB operations based on shared bit App 20020065993 - Chauvel, Gerard	2002-05-30
Address Space priority arbitration App 20020065867 - Chauvel, Gerard	2002-05-30
Fast hardware looping mechanism for cache cleaning and flushing of cache entries corresponding to a qualifier field App 20020065980 - Lasserre, Serge ; et al.	2002-05-30
Priority arbitration based on current task and MMU App 20020062427 - Chauvel, Gerard ; et al.	2002-05-23
TLB operation based on task-ID App 20020062425 - Chauvel, Gerard	2002-05-23
Cache with block prefetch and DMA App 20020062409 - Lasserre, Serge ; et al.	2002-05-23
Fault management and recovery based on task-ID App 20020062459 - Lasserre, Serge ; et al.	2002-05-23
Processing system with shared translation lookaside buffer App 20020062434 - Chauvel, Gerard ; et al.	2002-05-23
Dynamic hardware control for energy management systems using task attributes App 20020055961 - Chauvel, Gerard ; et al.	2002-05-09
Task based adaptative profilig and debugging App 20020053684 - Chauvel, Gerard ; et al.	2002-05-09
Dynamic hardware configuration for energy management systems using task attributes App 20020042887 - Chauvel, Gerard ; et al.	2002-04-11
Audio and video decoder circuit and system Grant 6,369,855 - Chauvel , et al. April 9, 2	2002-04-09
Computer circuits, systems, and methods using partial cache cleaning Grant 6,321,299 - Chauvel , et al. November 20, 2	2001-11-20
Memory control using memory state information for reducing access latency Grant 6,253,297 - Chauvel , et al. June 26, 2	2001-06-26
Transport stream packet parser system Grant 6,226,291 - Chauvel , et al. May 1, 2	2001-05-01
Protocol processor intended for the execution of a collection of instructions in a reduced number of operations Grant 5,740,458 - Chauvel , et al. April 14, 1	1998-04-14
Method and apparatus for inputting data to a single instruction, multiple data processor used in a television receiving system Grant 5,659,776 - Chauvel August 19, 1	1997-08-19
Digital filtering with single-instruction, multiple-data processor Grant 5,210,705 - Chauvel , et al. May 11, 1	1993-05-11
Process and device for graphically drawing point by point a closed curve of the second order Grant 5,182,795 - Boutaud , et al. January 26, 1	1993-01-26
Video display control system having improved storage of alphanumeric and graphic display data Grant 4,814,756 - Chauvel March 21, 1	1989-03-21
System for displaying graphic information on video screen employing video display processor Grant 4,799,146 - Chauvel January 17, 1	1989-01-17
Device for the composition of color component signals from luminance and chrominance signals and video display device comprising the application thereof Grant 4,791,476 - Chauvel December 13, 1	1988-12-13
Video image processing system Grant 4,768,157 - Chauvel , et al. August 30, 1	1988-08-30
Memory access controller having cycle number register for storing the number of column address cycles in a multiple column address/single row address memory access cycle Grant 4,623,986 - Chauvel November 18, 1	1986-11-18
Video display system Grant 4,620,289 - Chauvel October 28, 1	1986-10-28
Electronic ignition control for internal combustion engine Grant 4,562,812 - Chauvel January 7, 1	1986-01-07
System for direct access to a memory associated with a microprocessor Grant 4,240,138 - Chauvel December 16, 1	1980-12-16