loadpatents
Patent applications and USPTO patent grants for CHAUHAN; RAJAT.The latest application filed is for "voltage monitor using a capacitive digital-to-analog converter".
Patent | Date |
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Voltage Monitor Using A Capacitive Digital-to-analog Converter App 20220283207 - CHAUHAN; RAJAT ;   et al. | 2022-09-08 |
Trim/test Interface For Devices With Low Pin Count Or Analog Or No-connect Pins App 20220238143 - Chauhan; Rajat ;   et al. | 2022-07-28 |
Voltage monitor using a capacitive digital-to-analog converter Grant 11,372,032 - Chauhan , et al. June 28, 2 | 2022-06-28 |
CAPTURE AND RELEASE GELS FOR OPTIMIZED STORAGE (CaRGOS) FOR BIOSPECIMENS App 20220183973 - Gupta; Gautam ;   et al. | 2022-06-16 |
Voltage threshold gap circuits with temperature trim Grant 11,353,901 - Chauhan , et al. June 7, 2 | 2022-06-07 |
Voltage sensing circuit Grant 11,293,954 - Gupta , et al. April 5, 2 | 2022-04-05 |
Single inductor multiple output regulator Grant 11,190,105 - Singhal , et al. November 30, 2 | 2021-11-30 |
Threshold tracking power-on-reset circuit Grant 11,177,803 - Kaur , et al. November 16, 2 | 2021-11-16 |
Supply Voltage Regulator App 20210311515 - Mathad; Jayateerth Pandurang ;   et al. | 2021-10-07 |
Buffer circuit Grant 11,139,807 - Chauhan , et al. October 5, 2 | 2021-10-05 |
Supply voltage regulator Grant 11,079,780 - Mathad , et al. August 3, 2 | 2021-08-03 |
Threshold Tracking Power-on-reset Circuit App 20210184671 - Kaur; Divya ;   et al. | 2021-06-17 |
Voltage Threshold Gap Circuits With Temperature Trim App 20210149424 - CHAUHAN; Rajat ;   et al. | 2021-05-20 |
Load current measurement Grant 10,855,184 - Menezes , et al. December 1, 2 | 2020-12-01 |
Buffer Circuit App 20200358433 - CHAUHAN; Rajat ;   et al. | 2020-11-12 |
Supply Voltage Supervisor App 20200336141 - S; Santhosh Kumar ;   et al. | 2020-10-22 |
Buffer Circuit Grant 10,763,839 - Chauhan , et al. Sep | 2020-09-01 |
Load Current Measurement App 20200204075 - MENEZES; Vinod Joseph ;   et al. | 2020-06-25 |
Scheme to guarantee clean reset output at supply power-up Grant 10,686,437 - Chauhan | 2020-06-16 |
Low frequency oscillator with ultra-low short circuit current Grant 10,601,408 - Chauhan , et al. | 2020-03-24 |
Supply Voltage Regulator App 20200073423 - Mathad; Jayateerth Pandurang ;   et al. | 2020-03-05 |
Buffer Circuit App 20200021281 - CHAUHAN; Rajat ;   et al. | 2020-01-16 |
Voltage Sensing Circuit App 20200018782 - GUPTA; Naman ;   et al. | 2020-01-16 |
Current Source Circuit App 20200019202 - KAUR; Divya ;   et al. | 2020-01-16 |
Scheme To Guarantee Clean Reset Output At Supply Power-up App 20200021285 - CHAUHAN; Rajat | 2020-01-16 |
Supply voltage regulator Grant 10,503,185 - Mathad , et al. Dec | 2019-12-10 |
Low Frequency Oscillator with Ultra-low Short Circuit Current App 20190319614 - Chauhan; Rajat ;   et al. | 2019-10-17 |
Load current measurement Grant 10,447,142 - Menezes , et al. Oc | 2019-10-15 |
Power-on reset circuit Grant 10,432,192 - Kaur , et al. O | 2019-10-01 |
Fail-safe input/output (IO) circuit Grant 10,262,722 - Vyavahare , et al. | 2019-04-16 |
Voltage Monitor App 20190094275 - CHAUHAN; RAJAT ;   et al. | 2019-03-28 |
Ultra-low power bandgap reference using a clocked amplifier Grant 9,866,112 - Chauhan January 9, 2 | 2018-01-09 |
Methods and apparatus for a low standby current DC-DC power controller with improved transient response Grant 9,812,960 - Kunz , et al. November 7, 2 | 2017-11-07 |
Methods and Apparatus for a Low Standby Current DC-DC Power Controller with Improved Transient Response App 20170187286 - Kunz; Keith Edmund ;   et al. | 2017-06-29 |
Fail-Safe I/O to Achieve Ultra Low System Power App 20170178714 - Vyavahare; Prajkta ;   et al. | 2017-06-22 |
Ultra Low Power Reduced Coupling Clocked Comparator App 20170149424 - Chauhan; Rajat ;   et al. | 2017-05-25 |
Fail-safe I/O to achieve ultra low system power Grant 9,627,035 - Vyavahare , et al. April 18, 2 | 2017-04-18 |
Fail-Safe I/O to Achieve Ultra Low System Power App 20160351247 - Vyavahare; Prajkta ;   et al. | 2016-12-01 |
Fail-safe I/o To Achieve Ultra Low System Power App 20160035412 - VYAVAHARE; Prajkta ;   et al. | 2016-02-04 |
Scheme to reduce stress of input/ output (IO) driver Grant 9,240,400 - P , et al. January 19, 2 | 2016-01-19 |
Scheme To Reduce Stress Of Input/ Output (io) Driver App 20150092308 - P; Venkateswara Reddy ;   et al. | 2015-04-02 |
Input-output (I/O) circuit supporting multiple I/O logic-level swings Grant 8,179,160 - Chauhan , et al. May 15, 2 | 2012-05-15 |
Circuit To Generate Cmos Level Signal To Track Core Supply Voltage (vdd) Level App 20100026375 - Yadav; Rajesh ;   et al. | 2010-02-04 |
On-die Thevenin Termination For High Speed I/o Interface App 20100007374 - Chauhan; Rajat ;   et al. | 2010-01-14 |
Output buffer circuit capable of synchronous and asynchronous data buffering using sensing circuit, and method and system of same Grant 7,613,853 - Chauhan , et al. November 3, 2 | 2009-11-03 |
Glitch reduced compensated circuits and methods for using such Grant 7,550,993 - Heragu , et al. June 23, 2 | 2009-06-23 |
Glitch Reduced Compensated Circuits And Methods For Using Such App 20090051390 - Heragu; Keerthinarayan P. ;   et al. | 2009-02-26 |
Precision voltage level shifter based on thin gate oxide transistors App 20080211541 - Chauhan; Rajat | 2008-09-04 |
System and method for a whole-chip electrostatic discharge protection that is independent of relative supply rail voltages and supply sequencing Grant 7,394,638 - Ahmad , et al. July 1, 2 | 2008-07-01 |
Differential receiver Grant 7,348,802 - Kasanyal , et al. March 25, 2 | 2008-03-25 |
Voltage translator having minimized power dissipation Grant 7,327,163 - Chauhan , et al. February 5, 2 | 2008-02-05 |
Configurable output buffer and method to provide differential drive Grant 7,236,013 - Kasanyal , et al. June 26, 2 | 2007-06-26 |
CMOS input buffer and a method for supporting multiple I/O standards Grant 7,233,176 - Sharma , et al. June 19, 2 | 2007-06-19 |
Input buffer and method of operating the same Grant 7,218,147 - Chauhan , et al. May 15, 2 | 2007-05-15 |
Reducing coupling effect on reference voltages when output buffers implemented with low voltage transistors generate high voltage output signals Grant 7,199,613 - Chauhan , et al. April 3, 2 | 2007-04-03 |
Utilization of unused IO block for core logic functions Grant 7,157,936 - Chauhan , et al. January 2, 2 | 2007-01-02 |
Reducing Coupling Effect on Reference Voltages When Output Buffers Implemented with Low Voltage Transistors Generate High Voltage Output Signals App 20060033529 - CHAUHAN; Rajat ;   et al. | 2006-02-16 |
Differential receiver App 20060017463 - Kasanyal; Sunil C. ;   et al. | 2006-01-26 |
Voltage translator having minimized power dissipation App 20050237084 - Chauhan, Rajat ;   et al. | 2005-10-27 |
Configurable output buffer and method to provide differential drive App 20050179466 - Kasanyal, Sunil Chandra ;   et al. | 2005-08-18 |
Input buffer and method of operating the same App 20050174146 - Chauhan, Rajat ;   et al. | 2005-08-11 |
CMOS input buffer and a method for supporting multiple I/O standards App 20050168246 - Sharma, Manoj Kumar ;   et al. | 2005-08-04 |
System and method for a whole-chip ESD protection that is independent of relative supply rail voltages and supply sequencing App 20050162791 - Ahmad, Adeel ;   et al. | 2005-07-28 |
Output buffer App 20050146367 - Chauhan, Rajat ;   et al. | 2005-07-07 |
Utilization of unused IO block for core logic functions App 20030172363 - Chauhan, Rajat ;   et al. | 2003-09-11 |
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