Chaudhry; Shailender

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chaudhry; Shailender.The latest application filed is for "memory type which is cacheable yet inaccessible by speculative instructions".

Company Profile

2.141.120

Chaudhry; Shailender - Santa Clara CA
Chaudhry; Shailender - Sunnyvale CA US
Chaudhry; Shailender - San Francisco CA US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Memory type which is cacheable yet inaccessible by speculative instructions Grant 10,642,744 - Boggs , et al.	2020-05-05
Memory Type Which Is Cacheable Yet Inaccessible By Speculative Instructions App 20190004961 - BOGGS; Darrell D. ; et al.	2019-01-03
Processor cluster migration techniques Grant 9,471,395 - Ahmad , et al. October 18, 2	2016-10-18
Store queue with token to facilitate efficient thread synchronization Grant 9,280,343 - Zeffer , et al. March 8, 2	2016-03-08
Facilitating efficient transactional memory and atomic operations via cache line marking Grant 9,268,710 - Cypher , et al. February 23, 2	2016-02-23
Mechanism for increasing the effective capacity of the working register file Grant 9,256,438 - Chaudhry , et al. February 9, 2	2016-02-09
Store queue having restricted and unrestricted entries Grant 9,146,744 - Caprioli , et al. September 29, 2	2015-09-29
Precise data return handling in speculative processors Grant 8,984,264 - Karlsson , et al. March 17, 2	2015-03-17
Method and structure for solving the evil-twin problem Grant 8,898,436 - Chaudhry , et al. November 25, 2	2014-11-25
Logical power throttling of instruction decode rate for successive time periods Grant 8,745,419 - Chaudhry , et al. June 3, 2	2014-06-03
Deadlock avoidance during store-mark acquisition Grant 8,732,407 - Cypher , et al. May 20, 2	2014-05-20
Checkpoint allocation in a speculative processor Grant 8,688,963 - Chaudhry , et al. April 1, 2	2014-04-01
Processor Cluster Migration Techniques App 20140059548 - Ahmad; Sagheer ; et al.	2014-02-27
Issuing instructions with unresolved data dependencies Grant 8,627,044 - Chaudhry , et al. January 7, 2	2014-01-07
Selectively defering load instructions after encountering a store instruction with an unknown destination address during speculative execution Grant 8,601,240 - Chaudhry , et al. December 3, 2	2013-12-03
Index generation for cache memories Grant 8,484,434 - Caprioli , et al. July 9, 2	2013-07-09
Processor with a register file that supports multiple-issue execution Grant 8,447,931 - Chaudhry , et al. May 21, 2	2013-05-21
Pseudo-LRU cache line replacement for a high-speed cache Grant 8,364,900 - Caprioli , et al. January 29, 2	2013-01-29
Logical Power Throttling App 20120331314 - Chaudhry; Shailender ; et al.	2012-12-27
Pre-fetching for a sibling cache Grant 8,341,357 - Karlsson , et al. December 25, 2	2012-12-25
Hardware transactional memory acceleration through multiple failure recovery Grant 8,327,188 - Karlsson , et al. December 4, 2	2012-12-04
Reducing temperature and power by instruction throttling at decode stage of processor pipeline in time constant duration steps Grant 8,219,831 - Chaudhry , et al. July 10, 2	2012-07-10
Index Generation For Cache Memories App 20120166756 - Caprioli; Paul ; et al.	2012-06-28
Issuing Instructions With Unresolved Data Dependencies App 20120089819 - Chaudhry; Shailender ; et al.	2012-04-12
Using address and non-address information for improved index generation for cache memories Grant 8,151,084 - Caprioli , et al. April 3, 2	2012-04-03
Handling A Store Instruction With An Unknown Destination Address During Speculative Execution App 20110276791 - Chaudhry; Shailender ; et al.	2011-11-10
Reducing Pipeline Restart Penalty App 20110264862 - Karlsson; Martin ; et al.	2011-10-27
Checkpoint Allocation In A Speculative Processor App 20110264898 - Chaudhry; Shailender ; et al.	2011-10-27
Pre-fetching For A Sibling Cache App 20110231612 - Karlsson; Martin R. ; et al.	2011-09-22
Simultaneous speculative threading light mode Grant 8,006,073 - Ali , et al. August 23, 2	2011-08-23
Precise Data Return Handling In Speculative Processors App 20110179258 - Karlsson; Martin R. ; et al.	2011-07-21
Limiting Speculative Instruction Fetching In A Processor App 20110179254 - Yip; Sherman H. ; et al.	2011-07-21
Cache line duplication in response to a way prediction conflict Grant 7,979,640 - Chaudhry , et al. July 12, 2	2011-07-12
Maintaining cache coherence using load-mark metadata to deny invalidation of load-marked cache lines Grant 7,949,831 - Cypher , et al. May 24, 2	2011-05-24
Hardware Transactional Memory Acceleration Through Multiple Failure Recovery App 20110119528 - Karlsson; Martin R. ; et al.	2011-05-19
Aggressive store merging in a processor that supports checkpointing Grant 7,934,080 - Caprioli , et al. April 26, 2	2011-04-26
Method and apparatus for synchronizing threads on a processor that supports transactional memory Grant 7,930,695 - Chaudhry , et al. April 19, 2	2011-04-19
Method and apparatus for tracking load-marks and store-marks on cache lines Grant 7,917,698 - Cypher , et al. March 29, 2	2011-03-29
Selectively monitoring loads to support transactional program execution Grant 7,904,664 - Tremblay , et al. March 8, 2	2011-03-08
Store Queue With Token To Facilitate Efficient Thread Synchronization App 20110035561 - Zeffer; Haakan E. ; et al.	2011-02-10
Dynamically Configuring Memory Interleaving For Locality And Performance Isolation App 20100325374 - Cypher; Robert E. ; et al.	2010-12-23
Store queue architecture for a processor that supports speculative execution Grant 7,849,290 - Cypher , et al. December 7, 2	2010-12-07
Return address stack recovery in a speculative execution computing apparatus Grant 7,836,290 - Chaudhry , et al. November 16, 2	2010-11-16
Continuing execution in scout mode while a main thread resumes normal execution Grant 7,836,281 - Tremblay , et al. November 16, 2	2010-11-16
Method And Structure For Solving The Evil-twin Problem App 20100268919 - Chaudhry; Shailender ; et al.	2010-10-21
Selectively monitoring stores to support transactional program execution Grant 7,818,510 - Tremblay , et al. October 19, 2	2010-10-19
Facilitating load reordering through cacheline marking Grant 7,797,491 - Cypher , et al. September 14, 2	2010-09-14
Preventing store starvation in a system that supports marked coherence Grant 7,774,552 - Cypher , et al. August 10, 2	2010-08-10
Logical Power Throttling App 20100191993 - Chaudhry; Shailender ; et al.	2010-07-29
Mechanism For Increasing The Effective Capacity Of The Working Register File App 20100180103 - Chaudhry; Shailender ; et al.	2010-07-15
Method and apparatus for measuring performance during speculative execution Grant 7,757,068 - Caprioli , et al. July 13, 2	2010-07-13
Facilitating store reordering through cacheline marking Grant 7,757,044 - Cypher , et al. July 13, 2	2010-07-13
Method and apparatus for supporting very large transactions Grant 7,739,456 - Cypher , et al. June 15, 2	2010-06-15
Starvation-avoiding unbounded transactional memory Grant 7,730,265 - Cypher , et al. June 1, 2	2010-06-01
Deadlock Avoidance During Store-mark Acquisition App 20100125707 - Cypher; Robert E. ; et al.	2010-05-20
Method and apparatus for counting instructions during speculative execution Grant 7,716,457 - Caprioli , et al. May 11, 2	2010-05-11
Method and structure for explicit software control using scoreboard status information Grant 7,711,928 - Tremblay , et al. May 4, 2	2010-05-04
Cache line marking with shared timestamps Grant 7,698,504 - Cypher , et al. April 13, 2	2010-04-13
Method and apparatus for enforcing membar instruction semantics in an execute-ahead processor Grant 7,689,813 - Caprioli , et al. March 30, 2	2010-03-30
Method and apparatus for implementing virtual transactional memory using cache line marking Grant 7,676,636 - Cypher , et al. March 9, 2	2010-03-09
Logging of level-two cache transactions into banks of the level-two cache stores the transactions for diagnostic and debug Grant 7,673,103 - Chaudhry , et al. March 2, 2	2010-03-02
Recovering A Subordinate Strand From A Branch Misprediction Using State Information From A Primary Strand App 20100049957 - Tremblay; Marc ; et al.	2010-02-25
Recovering a subordinate strand from a branch misprediction using state information from a primary strand Grant 7,664,942 - Tremblay , et al. February 16, 2	2010-02-16
Checkpointing In A Processor That Supports Simultaneous Speculative Threading App 20100031084 - Tremblay; Marc ; et al.	2010-02-04
Cache Line Duplication In Response To A Way Prediction Conflict App 20100023701 - Chaudhry; Shailender ; et al.	2010-01-28
Method and structure for coordinating instruction execution in out-of-order processor execution using an instruction including an artificial register dependency Grant 7,650,487 - Chaudhry , et al. January 19, 2	2010-01-19
Branch target aware instruction prefetching technique Grant 7,647,477 - Caprioli , et al. January 12, 2	2010-01-12
Avoiding live-lock in a processor that supports speculative execution Grant 7,634,639 - Chaudhry , et al. December 15, 2	2009-12-15
Method and apparatus for using multiple threads to spectulatively execute instructions Grant 7,634,641 - Chaudhry , et al. December 15, 2	2009-12-15
Effective elimination of delay slot handling from a front section of a processor pipeline Grant 7,634,644 - Chaudhry , et al. December 15, 2	2009-12-15
Aggressive Store Merging In A Processor That Supports Checkpointing App 20090300338 - Caprioli; Paul ; et al.	2009-12-03
Store Queue App 20090282225 - Caprioli; Paul ; et al.	2009-11-12
Method and apparatus for reporting failure conditions during transactional execution Grant 7,617,421 - Caprioli , et al. November 10, 2	2009-11-10
Mechanism for hardware tracking of return address after tail call elimination of return-type instruction Grant 7,610,474 - Caprioli , et al. October 27, 2	2009-10-27
Preventing register data flow hazards in an SST processor Grant 7,610,470 - Chaudhry , et al. October 27, 2	2009-10-27
Efficient store queue architecture Grant 7,594,100 - Cypher , et al. September 22, 2	2009-09-22
Method and structure for concurrent branch prediction in a processor Grant 7,590,830 - Chaudhry , et al. September 15, 2	2009-09-15
Method and apparatus for supporting different modes of multi-threaded speculative execution Grant 7,584,346 - Chaudhry , et al. September 1, 2	2009-09-01
Pseudo-lru Cache Line Replacement For A High-speed Cache App 20090204761 - Caprioli; Paul ; et al.	2009-08-13
Time-multiplexed speculative multi-threading to support single-threaded applications Grant 7,574,588 - Chaudhry , et al. August 11, 2	2009-08-11
Generation of multiple checkpoints in a processor that supports speculative execution Grant 7,571,304 - Chaudhry , et al. August 4, 2	2009-08-04
Index Generation For Cache Memories App 20090187727 - Caprioli; Paul ; et al.	2009-07-23
Semi-ordered Transactions App 20090187906 - Caprioli; Paul ; et al.	2009-07-23
Working register file entries with instruction based lifetime Grant 7,565,511 - Chaudhry , et al. July 21, 2	2009-07-21
Efficient marking of shared cache lines Grant 7,549,025 - Cypher , et al. June 16, 2	2009-06-16
Maintaining Cache Coherence Using Load-mark Metadata App 20090119461 - Cypher; Robert E. ; et al.	2009-05-07
Method And Apparatus For Tracking Load-marks And Store-marks On Cache Lines App 20090113131 - Cypher; Robert E. ; et al.	2009-04-30
Method and apparatus for enforcing memory reference ordering requirements at the L1 cache level Grant 7,523,266 - Chaudhry , et al. April 21, 2	2009-04-21
Enforcing memory-reference ordering requirements at the L2 cache level Grant 7,519,775 - Chaudhry , et al. April 14, 2	2009-04-14
Patchable and/or programmable pre-decode Grant 7,509,481 - Chaudhry , et al. March 24, 2	2009-03-24
Collapsible front-end translation for instruction fetch Grant 7,509,472 - Caprioli , et al. March 24, 2	2009-03-24
Start transactional execution (STE) instruction to support transactional program execution Grant 7,500,086 - Tremblay , et al. March 3, 2	2009-03-03
Storing results of resolvable branches during speculative execution to predict branches during non-speculative execution Grant 7,490,229 - Tremblay , et al. February 10, 2	2009-02-10
Method and apparatus for accessing registers during deferred execution Grant 7,487,335 - Chaudhry , et al. February 3, 2	2009-02-03
Entering scout-mode when stores encountered during execute-ahead mode exceed the capacity of the store buffer Grant 7,484,080 - Chaudhry , et al. January 27, 2	2009-01-27
Method and Apparatus for Implementing Virtual Transactional Memory Using Cache Line Marking App 20090019231 - Cypher; Robert E. ; et al.	2009-01-15
Store Queue Architecture For A Processor That Supports Speculative Execution App 20090019272 - Cypher; Robert E. ; et al.	2009-01-15
Technique for eliminating dead stores in a processor Grant 7,478,203 - Caprioli , et al. January 13, 2	2009-01-13
Cache Line Marking With Shared Timestamps App 20090013133 - Cypher; Robert E. ; et al.	2009-01-08
Predicting a jump target based on a program counter and state information for a process Grant 7,472,264 - Yip , et al. December 30, 2	2008-12-30
Method and apparatus for facilitating a fast restart after speculative execution Grant 7,469,334 - Chaudhry , et al. December 23, 2	2008-12-23
Method and apparatus for suppressing duplicative prefetches for branch target cache lines Grant 7,461,237 - Ali , et al. December 2, 2	2008-12-02
Circuitry and method for accessing an associative cache with parallel determination of data and data availability Grant 7,461,208 - Caprioli , et al. December 2, 2	2008-12-02
Arithmetic early bypass Grant 7,421,465 - Rarick , et al. September 2, 2	2008-09-02
Fail instruction to support transactional program execution Grant 7,418,577 - Tremblay , et al. August 26, 2	2008-08-26
Method and apparatus for sampling instructions on a processor that supports speculative execution Grant 7,418,581 - Chaudhry , et al. August 26, 2	2008-08-26
Value-based memory coherence support Grant 7,412,567 - Zeffer , et al. August 12, 2	2008-08-12
Preventing register data flow hazards in an SST processor App 20080189531 - Chaudhry; Shailender ; et al.	2008-08-07
Method and apparatus for counting instructions during speculative execution App 20080172549 - Caprioli; Paul ; et al.	2008-07-17
Method and apparatus for measuring performance during speculative execution App 20080172548 - Caprioli; Paul ; et al.	2008-07-17
Avoiding locks by transactionally executing critical sections Grant 7,398,355 - Moir , et al. July 8, 2	2008-07-08
Selectively unmarking load-marked cache lines during transactional program execution Grant 7,389,383 - Tremblay , et al. June 17, 2	2008-06-17
Efficient marking of shared cache lines App 20080140935 - Cypher; Robert E. ; et al.	2008-06-12
Method and apparatus for reporting failure conditions during transactional execution App 20080126883 - Caprioli; Paul ; et al.	2008-05-29
Facilitating load reordering through cacheline marking App 20080104335 - Cypher; Robert E. ; et al.	2008-05-01
Facilitating store reordering through cacheline marking App 20080104326 - Cypher; Robert E. ; et al.	2008-05-01
Facilitating value prediction to support speculative program execution Grant 7,366,880 - Chaudhry , et al. April 29, 2	2008-04-29
Efficient store queue architecture App 20080082738 - Cypher; Robert E. ; et al.	2008-04-03
Patchable and/or programmable decode using predecode selection Grant 7,353,363 - Chaudhry , et al. April 1, 2	2008-04-01
Start Transactional Execution (ste) Instruction To Support Transactional Program Execution App 20080022082 - Tremblay; Marc ; et al.	2008-01-24
Dynamically shared high-speed jump target predictor App 20080005545 - Yip; Edmond H. ; et al.	2008-01-03
Selectively Monitoring Loads To Support Transactional Program Execution App 20070283353 - Tremblay; Marc ; et al.	2007-12-06
Logging of level-two cache transactions into banks of the level-two cache stores the transactions for diagnostic and debug App 20070283099 - Chaudhry; Shailender ; et al.	2007-12-06
Selectively Monitoring Stores To Support Transactional Program Execution App 20070271445 - Tremblay; Marc ; et al.	2007-11-22
Deferring loads and stores when a load buffer or store buffer fills during execute-ahead mode Grant 7,293,161 - Chaudhry , et al. November 6, 2	2007-11-06
Mechanism for eliminating the restart penalty when reissuing deferred instructions Grant 7,293,160 - Chaudhry , et al. November 6, 2	2007-11-06
Value-based memory coherence support App 20070255907 - Zeffer; Hakan E. ; et al.	2007-11-01
Method and apparatus for synchronizing threads on a processor that supports transactional memory App 20070240158 - Chaudhry; Shailender ; et al.	2007-10-11
Selectively performing fetches for store operations during speculative execution Grant 7,277,989 - Chaudhry , et al. October 2, 2	2007-10-02
Patchable And/or Programmable Pre-decode App 20070226464 - Chaudhry; Shailender ; et al.	2007-09-27
Working Register File Entries With Instruction Based Lifetime App 20070226467 - Chaudhry; Shailender ; et al.	2007-09-27
Technique for eliminating dead stores in a processor App 20070226425 - Caprioli; Paul ; et al.	2007-09-27
Method and apparatus for sampling instructions on a processor that supports speculative execution App 20070226472 - Chaudhry; Shailender ; et al.	2007-09-27
Patchable And/or Programmable Decode Using Predecode Selection App 20070226463 - Chaudhry; Shailender ; et al.	2007-09-27
Technique for executing selected instructions in order App 20070226465 - Chaudhry; Shailender ; et al.	2007-09-27
Effective Elimination Of Delay Slot Handling From A Front Section Of A Processor Pipeline App 20070226475 - Chaudhry; Shailender ; et al.	2007-09-27
Method for reducing lock manipulation overhead during access to critical code sections Grant 7,269,717 - Tremblay , et al. September 11, 2	2007-09-11
Selectively monitoring loads to support transactional program execution Grant 7,269,694 - Tremblay , et al. September 11, 2	2007-09-11
Selectively monitoring stores to support transactional program execution Grant 7,269,693 - Tremblay , et al. September 11, 2	2007-09-11
Method and apparatus for avoiding read-after-write hazards in an execute-ahead processor Grant 7,263,603 - Chaudhry , et al. August 28, 2	2007-08-28
Enforcing memory-reference ordering requirements at the L2 cache level App 20070198778 - Chaudhry; Shailender ; et al.	2007-08-23
Avoiding register RAW hazards when returning from speculative execution Grant 7,257,700 - Chaudhry , et al. August 14, 2	2007-08-14
Selective execution of deferred instructions in a processor that supports speculative execution Grant 7,257,699 - Chaudhry , et al. August 14, 2	2007-08-14
Supporting out-of-order issue in an execute-ahead processor App 20070186081 - Chaudhry; Shailender ; et al.	2007-08-09
Method and apparatus for enforcing memory reference ordering requirements at the L1 cache level App 20070186053 - Chaudhry; Shailender ; et al.	2007-08-09
Collapsible front-end translation for instruction fetch App 20070180218 - Caprioli; Paul ; et al.	2007-08-02
Decoupling register bypassing from pipeline depth App 20070136562 - Caprioli; Paul ; et al.	2007-06-14
Mechanism for hardware tracking of return address after tail call elimination of return-type instruction App 20070130451 - Caprioli; Paul ; et al.	2007-06-07
Return address stack recovery in a speculative execution computing apparatus App 20070106888 - Chaudhry; Shailender ; et al.	2007-05-10
Method and apparatus for avoiding write-after-read hazards in an execute-ahead processor Grant 7,216,219 - Chaudhry , et al. May 8, 2	2007-05-08
Method and apparatus for supporting one or more servers on a single semiconductor chip Grant 7,216,202 - Chaudhry , et al. May 8, 2	2007-05-08
Method and apparatus for avoiding write-after-write hazards in an execute-ahead processor Grant 7,213,133 - Caprioli , et al. May 1, 2	2007-05-01
Method and apparatus for releasing memory locations during transactional execution Grant 7,206,903 - Moir , et al. April 17, 2	2007-04-17
Logging of level-two cache transactions into banks of the level-two cache for system rollback Grant 7,191,292 - Chaudhry , et al. March 13, 2	2007-03-13
Avoiding live-lock in a processor that supports speculative execution App 20070050601 - Chaudhry; Shailender ; et al.	2007-03-01
Translating loads for accelerating virtualized partition Grant 7,167,970 - Jacobson , et al. January 23, 2	2007-01-23
Facilitating efficient join operations between a head thread and a speculative thread Grant 7,168,076 - Chaudhry , et al. January 23, 2	2007-01-23
Method and structure for explicit software control of data speculation App 20070006195 - Braun; Christof ; et al.	2007-01-04
Hardware message buffer for supporting inter-processor communication Grant 7,152,232 - Chaudhry , et al. December 19, 2	2006-12-19
Selectively deferring instructions issued in program order utilizing a checkpoint and instruction deferral scheme App 20060271769 - Chaudhry; Shailender ; et al.	2006-11-30
Method and apparatus for suppressing duplicative prefetches for branch target cache lines App 20060242365 - Ali; Abid ; et al.	2006-10-26
Method and apparatus for fixing bit errors encountered during cache references without blocking Grant 7,127,643 - Tremblay , et al. October 24, 2	2006-10-24
Method and apparatus for providing fault-tolerance for temporary results within a CPU Grant 7,124,331 - Tremblay , et al. October 17, 2	2006-10-17
Selectively deferring instructions issued in program order utilizing a checkpoint and multiple deferral scheme Grant 7,114,060 - Chaudhry , et al. September 26, 2	2006-09-26
Generation of multiple checkpoints in a processor that supports speculative execution App 20060212688 - Chaudhry; Shailender ; et al.	2006-09-21
Method and apparatus for simultaneous speculative threading App 20060212689 - Chaudhry; Shailender ; et al.	2006-09-21
Selectively unmarking load-marked cache lines during transactional program execution App 20060200632 - Tremblay; Marc ; et al.	2006-09-07
Selectively unmarking load-marked cache lines during transactional program execution Grant 7,089,374 - Tremblay , et al. August 8, 2	2006-08-08
Branch prediction accuracy in a processor that supports speculative execution App 20060168432 - Caprioli; Paul ; et al.	2006-07-27
Facilitating value prediction to support speculative program execution App 20060149945 - Chaudhry; Shailender ; et al.	2006-07-06
Time-multiplexed speculative multi-threading to support single-threaded applications App 20060149946 - Chaudhry; Shailender ; et al.	2006-07-06
Logging of level-two cache transactions into banks of the level-two cache for system rollback App 20060136672 - Chaudhry; Shailender ; et al.	2006-06-22
Method and apparatus for providing error correction within a register file of a CPU Grant 7,058,877 - Tremblay , et al. June 6, 2	2006-06-06
Facilitating value prediction to support speculative program execution Grant 7,051,192 - Chaudhry , et al. May 23, 2	2006-05-23
Start transactional execution (STE) instruction to support transactional program execution App 20060101254 - Tremblay; Marc ; et al.	2006-05-11
Translating loads for accelerating virtualized partition App 20060064567 - Jacobson; Quinn A. ; et al.	2006-03-23
Selectively performing fetches for store operations during speculative execution App 20060020757 - Chaudhry; Shailender ; et al.	2006-01-26
Selective execution of deferred instructions in a processor that supports speculative execution App 20060010309 - Chaudhry; Shailender ; et al.	2006-01-12
Mechanism for eliminating the restart penalty when reissuing deferred instructions App 20050278509 - Chaudhry, Shailender ; et al.	2005-12-15
Avoiding register RAW hazards when returning from speculative execution App 20050273580 - Chaudhry, Shailender ; et al.	2005-12-08
Method and apparatus for enforcing membar instruction semantics in an execute-ahead processor App 20050273583 - Caprioli, Paul ; et al.	2005-12-08
Multiple branch predictions App 20050268075 - Caprioli, Paul ; et al.	2005-12-01
Method and apparatus for delaying interfering accesses from other threads during transactional program execution App 20050262301 - Jacobson, Quinn A. ; et al.	2005-11-24
Branch target aware instruction prefetching technique App 20050257034 - Caprioli, Paul ; et al.	2005-11-17
Method and apparatus for avoiding raw hazards in an execute-ahead processor App 20050251666 - Chaudhry, Shailender ; et al.	2005-11-10
Entering scout-mode when stores encountered during execute-ahead mode exceed the capacity of the store buffer App 20050251668 - Chaudhry, Shailender ; et al.	2005-11-10
Method and apparatus for avoiding WAR hazards in an execute-ahead processor App 20050251665 - Chaudhry, Shailender ; et al.	2005-11-10
Method and apparatus for avoiding WAW hazards in an execute-ahead processor App 20050251664 - Caprioli, Paul ; et al.	2005-11-10
Storing results of resolvable branches during speculative execution to predict branches during non-speculative execution App 20050223200 - Tremblay, Marc ; et al.	2005-10-06
Method and structure for explicit software control using scoreboard status information App 20050223194 - Tremblay, Marc ; et al.	2005-10-06
Facilitating rapid progress while speculatively executing code in scout mode App 20050223201 - Tremblay, Marc ; et al.	2005-10-06
Method and structure for explicit software control of execution of a thread including a helper subthread App 20050223385 - Braun, Christof ; et al.	2005-10-06
Method and apparatus for decoupling tag and data accesses in a cache memory Grant 6,944,724 - Chaudhry , et al. September 13, 2	2005-09-13
Method and apparatus for delaying interfering accesses from other threads during transactional program execution Grant 6,938,130 - Jacobson , et al. August 30, 2	2005-08-30
Automatic prefetch of pointers Grant 6,934,809 - Tremblay , et al. August 23, 2	2005-08-23
Selectively deferring the execution of instructions with unresolved data dependencies as they are issued in program order App 20050081195 - Chaudhry, Shailender ; et al.	2005-04-14
Method and apparatus for avoiding locks by speculatively executing critical sections Grant 6,862,664 - Tremblay , et al. March 1, 2	2005-03-01
Providing fault-tolerance by comparing addresses and data from redundant processors running in lock-step Grant 6,862,693 - Chaudhry , et al. March 1, 2	2005-03-01
Method and apparatus for updating an error-correcting code during a partial line store Grant 6,848,071 - Chaudhry , et al. January 25, 2	2005-01-25
Selectively monitoring loads to support transactional program execution App 20040187116 - Tremblay, Marc ; et al.	2004-09-23
Selectively unmarking load-marked cache lines during transactional program execution App 20040187123 - Tremblay, Marc ; et al.	2004-09-23
Selectively monitoring stores to support transactional program execution App 20040187115 - Tremblay, Marc ; et al.	2004-09-23
Commit instruction to support transactional program execution App 20040163082 - Tremblay, Marc ; et al.	2004-08-19
Method and apparatus for avoiding locks by speculatively executing critical sections App 20040162948 - Tremblay, Marc ; et al.	2004-08-19
Method and apparatus for delaying interfering accesses from other threads during transactional program execution App 20040162951 - Jacobson, Quinn A. ; et al.	2004-08-19
Start transactional execution (STE) instruction to support transactional program execution App 20040162967 - Tremblay, Marc ; et al.	2004-08-19
Fail instruction to support transactional program execution App 20040162968 - Tremblay, Marc ; et al.	2004-08-19
Method and apparatus for using an assist processor and value speculation to facilitate prefetching for a primary processor Grant 6,772,321 - Chaudhry , et al. August 3, 2	2004-08-03
Generating prefetches by speculatively executing code through hardware scout threading App 20040133769 - Chaudhry, Shailender ; et al.	2004-07-08
Performing hardware scout threading in a system that supports simultaneous multithreading App 20040133767 - Chaudhry, Shailender ; et al.	2004-07-08
Method and apparatus for facilitating flow control during accesses to cache memory Grant 6,754,775 - Chaudhry , et al. June 22, 2	2004-06-22
Supporting inter-process communication through a conditional trap instruction Grant 6,732,363 - Chaudhry , et al. May 4, 2	2004-05-04
Method and apparatus for providing fault-tolerance for temporary results within a CPU App 20040078728 - Tremblay, Marc ; et al.	2004-04-22
Using an L2 directory to facilitate speculative loads in a multiprocessor system Grant 6,721,855 - Chaudhry , et al. April 13, 2	2004-04-13
Method and apparatus for facilitating speculative loads in a multiprocessor system Grant 6,718,839 - Chaudhry , et al. April 13, 2	2004-04-13
Marking memory elements based upon usage of accessed information during speculative execution Grant 6,721,944 - Chaudhry , et al. April 13, 2	2004-04-13
Method and apparatus for facilitating exception handling using a conditional trap instruction Grant 6,704,862 - Chaudhry , et al. March 9, 2	2004-03-09
Method and apparatus for facilitating speculative stores in a multiprocessor system Grant 6,704,841 - Chaudhry , et al. March 9, 2	2004-03-09
Method and apparatus for supporting multiple cache line invalidations per cycle Grant 6,701,417 - Chaudhry , et al. March 2, 2	2004-03-02
Reverse directory for facilitating accesses involving a lower-level cache Grant 6,684,297 - Chaudhry , et al. January 27, 2	2004-01-27
Monitor entry and exit for a speculative thread during space and time dimensional execution Grant 6,684,398 - Chaudhry , et al. January 27, 2	2004-01-27
Method and apparatus for using an assist processor to prefetch instructions for a primary processor Grant 6,681,318 - Chaudhry , et al. January 20, 2	2004-01-20
Parallel join operation to support space and time dimensional program execution Grant 6,658,451 - Chaudhry , et al. December 2, 2	2003-12-02
Method and apparatus for providing error correction within a register file of a CPU App 20030217325 - Tremblay, Marc ; et al.	2003-11-20
Monitor entry and exit for a speculative thread during space and time dimensional execution App 20030208673 - Chaudhry, Shailender ; et al.	2003-11-06
Time-multiplexed speculative multi-threading to support single-threaded applications App 20030188141 - Chaudhry, Shailender ; et al.	2003-10-02
Automatic prefetch of pointers App 20030163645 - Tremblay, Marc ; et al.	2003-08-28
Method and apparatus for fixing bit errors encountered during cache references without blocking App 20030093726 - Tremblay, Marc ; et al.	2003-05-15
Hardware message buffer for supporting inter-processor communication App 20030056020 - Chaudhry, Shailender ; et al.	2003-03-20
Method and apparatus for decoupling tag and data accesses in a cache memory App 20030056066 - Chaudhry, Shailender ; et al.	2003-03-20
Facilitating efficient join operations between a head thread and a speculative thread App 20030018826 - Chaudhry, Shailender ; et al.	2003-01-23
Method and apparatus for facilitating speculative loads in a multiprocessor system App 20020199066 - Chaudhry, Shailender ; et al.	2002-12-26
Method and apparatus for facilitating speculative stores in a multiprocessor system App 20020199063 - Chaudhry, Shailender ; et al.	2002-12-26
Using an L2 directory to facilitate speculative loads in a multiprocessor system App 20020199070 - Chaudhry, Shailender ; et al.	2002-12-26
Method and apparatus for facilitating flow control during accesses to cache memory App 20020188807 - Chaudhry, Shailender ; et al.	2002-12-12
Reverse directory for facilitating accesses involving a lower-level cache App 20020178329 - Chaudhry, Shailender ; et al.	2002-11-28
Method and apparatus for updating an error-correcting code during a partial line store App 20020157056 - Chaudhry, Shailender ; et al.	2002-10-24
Providing fault-tolerance by comparing addresses and data from redundant processors running in lock-step App 20020152420 - Chaudhry, Shailender ; et al.	2002-10-17
Supporting multi-dimensional space-time computing through object versioning Grant 6,463,526 - Chaudhry , et al. October 8, 2	2002-10-08
Using time stamps to improve efficiency in marking fields within objects Grant 6,460,067 - Chaudhry , et al. October 1, 2	2002-10-01
Marking memory elements based upon usage of accessed information during speculative execution App 20020095665 - Chaudhry, Shailender ; et al.	2002-07-18
Method and apparatus for using an assist processor to prefetch instructions for a primary processor App 20020095563 - Chaudhry, Shailender ; et al.	2002-07-18
Supporting space-time dimensional program execution by selectively versioning memory updates Grant 6,353,881 - Chaudhry , et al. March 5, 2	2002-03-05
Value speculation on an assist processor to facilitate prefetching for a primary processor App 20010052064 - Chaudhry, Shailender ; et al.	2001-12-13
Facilitating garbage collection during object versioning for space and time dimensional computing Grant 6,247,027 - Chaudhry , et al. June 12, 2	2001-06-12