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Patent applications and USPTO patent grants for CHATTERJEE; Niladrish.The latest application filed is for "techniques for configuring parallel processors for different application domains".
Patent | Date |
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Techniques For Configuring Parallel Processors For Different Application Domains App 20220276984 - FU; Yaosheng ;   et al. | 2022-09-01 |
Systems and methods for dynamic random access memory (DRAM) sub-channels Grant 10,468,093 - Chatterjee , et al. No | 2019-11-05 |
Page migration in a hybrid memory device Grant 9,910,605 - Jayasena , et al. March 6, 2 | 2018-03-06 |
Memory access methods and apparatus Grant 9,846,550 - Muralimanohar , et al. December 19, 2 | 2017-12-19 |
Systems And Methods For Dynamic Random Access Memory (dram) Sub-channels App 20170255552 - Chatterjee; Niladrish ;   et al. | 2017-09-07 |
Page Migration In A 3d Stacked Hybrid Memory App 20170160955 - Jayasena; Nuwan S. ;   et al. | 2017-06-08 |
Page migration in a 3D stacked hybrid memory Grant 9,535,831 - Jayasena , et al. January 3, 2 | 2017-01-03 |
Scheduling memory accesses using an efficient row burst value Grant 9,489,321 - O'Connor , et al. November 8, 2 | 2016-11-08 |
Memory Access Methods And Apparatus App 20160216912 - Muralimanohar; Naveen ;   et al. | 2016-07-28 |
Memory access methods and apparatus Grant 9,361,955 - Muralimanohar , et al. June 7, 2 | 2016-06-07 |
Page Migration In A 3d Stacked Hybrid Memory App 20150199126 - Jayasena; Nuwan S. ;   et al. | 2015-07-16 |
Scheduling Memory Accesses Using An Efficient Row Burst Value App 20140372711 - O'Connor; James M. ;   et al. | 2014-12-18 |
Inter-row Data Transfer In Memory Devices App 20140177347 - Chatterjee; Niladrish ;   et al. | 2014-06-26 |
Multiple Subarray Memory Access App 20140173170 - Muralimanohar; Naveen ;   et al. | 2014-06-19 |
Reducing Memory Access Time In Parallel Processors App 20140173225 - Chatterjee; Niladrish ;   et al. | 2014-06-19 |
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