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Chatterjee; Debapriya Patent Filings

Chatterjee; Debapriya

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chatterjee; Debapriya.The latest application filed is for "hardware support for software pointer authentification in a computing system".

Company Profile
16.17.20
  • Chatterjee; Debapriya - Austin TX
  • Chatterjee; Debapriya - Ann Arbor MI
  • Chatterjee; Debapriya - Kolkata N/A IN
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and system for detection of thread stall
Grant 11,436,013 - Bajaj , et al. September 6, 2
2022-09-06
Hardware Support For Software Pointer Authentification In A Computing System
App 20220191020 - Moreira; Jose E. ;   et al.
2022-06-16
Systems And Methods For Dynamic Control Of A Secure Mode Of Operation In A Processor
App 20220188464 - Chatterjee; Debapriya ;   et al.
2022-06-16
Method And System For On Demand Control Of Hardware Support For Software Pointer Authentification In A Computing System
App 20220188463 - Chatterjee; Debapriya ;   et al.
2022-06-16
Address translation cache invalidation in a microprocessor
Grant 11,301,392 - Chatterjee , et al. April 12, 2
2022-04-12
Identifying translation errors
Grant 11,243,864 - Cockcroft , et al. February 8, 2
2022-02-08
Dynamic modification of instructions that do not modify the architectural state of a processor
Grant 11,157,285 - Cockcroft , et al. October 26, 2
2021-10-26
Dynamic Modification Of Instructions That Do Not Modify The Architectural State Of A Processor
App 20210247982 - Cockcroft; Bryant ;   et al.
2021-08-12
Software-invisible interrupt for a microprocessor
Grant 11,080,122 - Leitner , et al. August 3, 2
2021-08-03
Software-invisible Interrupt For A Microprocessor
App 20210089382 - Leitner; Larry ;   et al.
2021-03-25
Obscuring Information In Virtualization Environment
App 20210089340 - Chatterjee; Debapriya ;   et al.
2021-03-25
Identifying Translation Errors
App 20210081296 - Cockcroft; Bryant ;   et al.
2021-03-18
System and method including broadcasting an address translation invalidation instruction with a return marker to indentify the location of data in a computing system having mutiple processors
Grant 10,942,853 - Schumann , et al. March 9, 2
2021-03-09
Address translation cache invalidation in a microprocessor
Grant 10,915,456 - Chatterjee , et al. February 9, 2
2021-02-09
Address Translation Cache Invalidation In A Microprocessor
App 20210019262 - Chatterjee; Debapriya ;   et al.
2021-01-21
Precise verification of a logic problem on a simulation accelerator
Grant 10,896,273 - Schumann , et al. January 19, 2
2021-01-19
Address Translation Cache Invalidation In A Microprocessor
App 20200371951 - Chatterjee; Debapriya ;   et al.
2020-11-26
Generating And Adding Additional Control Information To Logic Under Test To Facilitate Debugging And Comprehension Of A Simulation
App 20200364313 - Umbarger; Paul ;   et al.
2020-11-19
Method And System For Detection Of Thread Stall
App 20200225952 - Bajaj; Omesh ;   et al.
2020-07-16
Method and system for detection of thread stall
Grant 10,705,843 - Bajaj , et al.
2020-07-07
Data Location Identification
App 20200201767 - Schumann; John A. ;   et al.
2020-06-25
Precise Verification Of A Logic Problem On A Simulation Accelerator
App 20200117766 - SCHUMANN; JOHN A. ;   et al.
2020-04-16
Circuit design verification in a hardware accelerated simulation environment using breakpoints
Grant 10,539,614 - Batra , et al. Ja
2020-01-21
Method and System for Detection of Thread Stall
App 20190196816 - Bajaj; Omesh ;   et al.
2019-06-27
Driving pervasive commands using breakpoints in a hardware-accelerated simulation environment
Grant 10,228,422 - Chatterjee , et al.
2019-03-12
Driving Pervasive Commands Using Breakpoints In A Hardware-accelerated Simulation Environment
App 20180120379 - Chatterjee; Debapriya ;   et al.
2018-05-03
Circuit design verification in a hardware accelerated simulation environment using breakpoints
Grant 9,939,487 - Batra , et al. April 10, 2
2018-04-10
Circuit Design Verification In A Hardware Accelerated Simulation Environment Using Breakpoints
App 20180059182 - BATRA; Rahul ;   et al.
2018-03-01
Driving pervasive commands using breakpoints in a hardware-accelerated simulation environment
Grant 9,747,396 - Chatterjee , et al. August 29, 2
2017-08-29
Circuit Design Verification In A Hardware Accelerated Simulation Environment Using Breakpoints
App 20170176529 - BATRA; Rahul ;   et al.
2017-06-22
Gate-level logic simulator using multiple processor architectures
Grant 8,738,349 - Bertacco , et al. May 27, 2
2014-05-27
Instruction-by-instruction checking on acceleration platforms
Grant 8,601,418 - Chatterjee , et al. December 3, 2
2013-12-03
Instruction-by-instruction Checking On Acceleration Platforms
App 20130311962 - Chatterjee; Debapriya ;   et al.
2013-11-21
Gate-Level Logic Simulator Using Multiple Processor Architectures
App 20110257955 - Bertacco; Valeria ;   et al.
2011-10-20

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