Chastain; David M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chastain; David M..The latest application filed is for "server with a flexible cooling scheme".

Company Profile

0.16.2

Chastain; David M. - Austin TX
Chastain; David M. - Collin TX
Chastain; David M - Richardson TX
Chastain; David M. - Plano TX
Chastain, David M. - Richardson TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Server with a flexible cooling scheme Grant 7,558,063 - Belady , et al. July 7, 2	2009-07-07
Server With A Flexible Cooling Scheme App 20080266790 - Belady; Christian L. ; et al.	2008-10-30
Ventilation port and EMI wave-guide for electronic equipment Grant 6,384,325 - Chastain , et al. May 7, 2	2002-05-07
IC die power connection using canted coil spring Grant 6,313,523 - Morris , et al. November 6, 2	2001-11-06
IC die power connection using canted coil spring App 20010010946 - Morris, Terrel L. ; et al.	2001-08-02
Method and system for maintaining strong ordering in a coherent memory system Grant 5,930,822 - Chaney , et al. July 27, 1	1999-07-27
Error containment cluster of nodes Grant 5,845,071 - Patrick , et al. December 1, 1	1998-12-01
Parallel processing computer system interconnections utilizing unidirectional communication links with separate request and response lines for direct communication or using a crossbar switching device Grant 5,577,204 - Brewer , et al. November 19, 1	1996-11-19
Scalable parallel processing systems wherein each hypernode has plural processing modules interconnected by crossbar and each processing module has SCI circuitry for forming multi-dimensional network with other hypernodes Grant 5,560,027 - Watson , et al. September 24, 1	1996-09-24
Multi-processor computer system having process-independent communication register addressing Grant 5,159,686 - Chastain , et al. October 27, 1	1992-10-27
Multi-processor computer system having self-allocating processors Grant 5,050,070 - Chastain , et al. September 17, 1	1991-09-17
Hierarchical memory system with logical cache, physical cache, and address translation unit for generating a sequence of physical addresses Grant 4,926,317 - Wallach , et al. May 15, 1	1990-05-15
Instruction processing unit for computer Grant 4,873,629 - Harris , et al. October 10, 1	1989-10-10
Memory system with write protection Grant 4,665,506 - Cline , et al. May 12, 1	1987-05-12
Computer system Grant 4,620,275 - Wallach , et al. October 28, 1	1986-10-28
Memory system using pipeline circuitry for improved speed Grant 4,597,061 - Cline , et al. June 24, 1	1986-06-24
Memory system with built in parity Grant 4,528,666 - Cline , et al. July 9, 1	1985-07-09
Operation sequencing mechanism Grant 4,197,589 - Cornish , et al. April 8, 1	1980-04-08

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.