Chary; Rasoju Veerabadra

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chary; Rasoju Veerabadra.The latest application filed is for "word line decoders for dual rail static random access memories".

Company Profile

0.9.11

Chary; Rasoju Veerabadra - Bangalore IN
Chary; Rasoju Veerabadra - Karnataka N/A IN

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Bit line write assist for static random access memory architectures Grant 9,177,633 - Roy , et al. November 3, 2	2015-11-03
Dual rail single-ended read data paths for static random access memories Grant 9,177,635 - Evans , et al. November 3, 2	2015-11-03
Word Line Decoders For Dual Rail Static Random Access Memories App 20150302918 - Roy; Rajiv Kumar ; et al.	2015-10-22
Bit Line Write Assist For Static Random Access Memory Architectures App 20150255148 - Roy; Rajiv Kumar ; et al.	2015-09-10
Differential latch word line assist for SRAM Grant 9,111,637 - Sahu , et al. August 18, 2	2015-08-18
Global Bitline Write Assist For Sram Architectures App 20150138876 - Roy; Rajiv Kumar ; et al.	2015-05-21
Interleaved Write Assist For Hierarchical Bitline Sram Architectures App 20150138863 - Roy; Rajiv Kumar ; et al.	2015-05-21
Memory Architecture With Alternating Segments And Multiple Bitlines App 20150138864 - Evans; Donald Albert ; et al.	2015-05-21
Adjusting access times to memory cells based on characterized word-line delay and gate delay Grant 8,787,099 - Evans , et al. July 22, 2	2014-07-22
Adjusting bit-line discharge time in memory arrays based on characterized word-line delay and gate delay Grant 8,773,927 - Evans , et al. July 8, 2	2014-07-08
Adjusting Bit-line Discharge Time In Memory Arrays Based On Characterized Word-line Delay And Gate Delay App 20140071775 - Evans; Donald Albert ; et al.	2014-03-13
Adjusting Access Times To Memory Cells Based On Characterized Word-line Delay And Gate Delay App 20130343139 - Evans; Donald Albert ; et al.	2013-12-26
Memory device with area efficient power gating circuitry Grant 8,462,562 - Goel , et al. June 11, 2	2013-06-11
Memory Device With Area Efficient Power Gating Circuitry App 20130128676 - Goel; Ankur ; et al.	2013-05-23

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