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name:-0.025264978408813
name:-0.021353960037231
name:-0.00059080123901367
CHAPELON; Laurent-Luc Patent Filings

CHAPELON; Laurent-Luc

Patent Applications and Registrations

Patent applications and USPTO patent grants for CHAPELON; Laurent-Luc.The latest application filed is for "image acquisition device".

Company Profile
0.29.23
  • CHAPELON; Laurent-Luc - Domene FR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Image Acquisition Device
App 20210327936 - FOUREL; Mickael ;   et al.
2021-10-21
Phase-change memory
Grant 10,403,682 - Morin , et al. Sep
2019-09-03
Phase-change Memory
App 20180323237 - MORIN; Pierre ;   et al.
2018-11-08
Integrated structure with improved heat dissipation
Grant 9,520,334 - Chapelon , et al. December 13, 2
2016-12-13
Integrated circuit chip and fabrication method
Grant 9,455,239 - Chapelon , et al. September 27, 2
2016-09-27
Method for estimating the diffusion length of metallic species within a three-dimensional integrated structure, and corresponding three-dimensional integrated structure
Grant 9,431,373 - Taibi , et al. August 30, 2
2016-08-30
Electronic chip comprising connection pillars and manufacturing method
Grant 9,293,429 - Chapelon March 22, 2
2016-03-22
Integrated Circuit Chip And Fabrication Method
App 20150287689 - Chapelon; Laurent-Luc ;   et al.
2015-10-08
Process for fabricating a three-dimensional integrated structure with improved heat dissipation, and corresponding three-dimensional integrated structure
Grant 9,136,233 - Chapelon September 15, 2
2015-09-15
Stack of semiconductor structures and corresponding manufacturing method
Grant 9,093,456 - Chapelon July 28, 2
2015-07-28
Integrated circuit chip and fabrication method
Grant 9,093,505 - Chapelon , et al. July 28, 2
2015-07-28
Method For Estimating The Diffusion Length Of Metallic Species Within A Three-dimensional Integrated Structure, And Corresponding Three-dimensional Integrated Structure
App 20150137330 - TAIBI; Rachid ;   et al.
2015-05-21
Integrated circuit chip and fabrication method
Grant 8,980,738 - Chapelon , et al. March 17, 2
2015-03-17
Stack Of Semiconductor Structures And Corresponding Manufacturing Method
App 20150054140 - Chapelon; Laurent-Luc
2015-02-26
Method for estimating the diffusion length of metallic species within a three-dimensional integrated structure, and corresponding three-dimensional integrated structure
Grant 8,916,393 - Taibi , et al. December 23, 2
2014-12-23
Process For Fabricating A Three-dimensional Integrated Structure With Improved Heat Dissipation, And Corresponding Three-dimensional Integrated Structure
App 20140361413 - Chapelon; Laurent-Luc
2014-12-11
Stack of semiconductor structures and corresponding manufacturing method
Grant 8,907,481 - Chapelon December 9, 2
2014-12-09
Chip assembly system
Grant 8,896,121 - Chapelon November 25, 2
2014-11-25
Three-dimensional integrated structure capable of detecting a temperature rise
Grant 8,890,276 - Chapelon November 18, 2
2014-11-18
Method for manufacturing an integrated circuit comprising vias crossing the substrate
Grant 8,860,186 - Bouchoucha , et al. October 14, 2
2014-10-14
Integrated Structure With Improved Heat Dissipation
App 20140210071 - Chapelon; Laurent-Luc ;   et al.
2014-07-31
Integrated circuit comprising a device with a vertical mobile element integrated in a support substrate and method for producing the device with a mobile element
Grant 8,766,381 - Casset , et al. July 1, 2
2014-07-01
Method for determining the local stress induced in a semiconductor material wafer by through vias
Grant 8,726,736 - Bouchoucha , et al. May 20, 2
2014-05-20
Method of assembling two integrated circuits and corresponding structure
Grant 8,674,517 - Chapelon , et al. March 18, 2
2014-03-18
Method for formation of an electrically conducting through via
Grant 8,673,740 - Cuzzocrea , et al. March 18, 2
2014-03-18
Three-dimensional Integrated Structure Capable Of Detecting A Temperature Rise
App 20140015088 - Chapelon; Laurent-Luc
2014-01-16
Stack Of Semiconductor Structures And Corresponding Manufacturing Method
App 20130292823 - Chapelon; Laurent-Luc
2013-11-07
Process for fabricating integrated-circuit chips
Grant 8,518,802 - Chapelon , et al. August 27, 2
2013-08-27
Method For Manufacturing An Integrated Circuit Comprising Vias Crossing The Substrate
App 20130207279 - BOUCHOUCHA; Mohamed ;   et al.
2013-08-15
Chip Assembly System
App 20130207268 - CHAPELON; Laurent-Luc
2013-08-15
Method For Estimating The Diffusion Length Of Metallic Species Within A Three-dimensional Integrated Structure, And Corresponding Three-dimensional Integrated Structure
App 20130181220 - Taibi; Rachid ;   et al.
2013-07-18
Process for fabricating integrated-circuit chips
Grant 8,466,038 - Chapelon , et al. June 18, 2
2013-06-18
Method For Determining The Local Stress Induced In A Semiconductor Material Wafer By Through Vias
App 20130112974 - Bouchoucha; Mohamed ;   et al.
2013-05-09
Method For Formation Of An Electrically Conducting Through Via
App 20130084687 - CUZZOCREA; Julien ;   et al.
2013-04-04
Electronic Chip Comprising Connection Pillars And Manufacturing Method
App 20130026627 - Chapelon; Laurent-Luc
2013-01-31
Integrated Circuit Chip And Fabrication Method
App 20120171877 - Chapelon; Laurent-Luc ;   et al.
2012-07-05
Method Of Assembling Two Integrated Circuits And Corresponding Structure
App 20120153475 - Chapelon; Laurent-Luc ;   et al.
2012-06-21
Process For Fabricating Integrated-circuit Chips
App 20120153425 - Chapelon; Laurent-Luc ;   et al.
2012-06-21
Process For Fabricating Integrated-circuit Chips
App 20120156859 - Chapelon; Laurent-Luc ;   et al.
2012-06-21
Integrated Circuit Chip And Fabrication Method
App 20120146226 - Chapelon; Laurent-Luc ;   et al.
2012-06-14

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