Chang; Vencent

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chang; Vencent.The latest application filed is for "methodology for implementing enhanced optical lithography for hole patterning in semiconductor fabrication".

Company Profile

0.20.21

Chang; Vencent - Hsin-Chu TW
Chang; Vencent - Hsinchu TW
Chang; Vencent - Taipei TW
Chang; Vencent - Taipei City TW
Chang; Vencent - Jhubei County TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methodology for implementing enhanced optical lithography for hole patterning in semiconductor fabrication Grant 9,366,969 - Liu , et al. June 14, 2	2016-06-14
Contrast enhancing exposure system and method for use in semiconductor fabrication Grant 9,091,923 - Liu , et al. July 28, 2	2015-07-28
Method for patterning a photosensitive layer Grant 8,815,496 - Lu , et al. August 26, 2	2014-08-26
Method for etching an ultra thin film Grant 8,623,231 - Liu , et al. January 7, 2	2014-01-07
Methodology For Implementing Enhanced Optical Lithography For Hole Patterning In Semiconductor Fabrication App 20130286371 - Liu; George ; et al.	2013-10-31
Method for Patterning a Photosensitive Layer App 20130164686 - Lu; Hsiao-Tzu ; et al.	2013-06-27
Methodology for implementing enhanced optical lithography for hole patterning in semiconductor fabrication Grant 8,472,005 - Liu , et al. June 25, 2	2013-06-25
Method for patterning a photosensitive layer Grant 8,394,576 - Lu , et al. March 12, 2	2013-03-12
Method For Patterning A Photosensitive Layer App 20120114872 - Lu; Hsiao-Tzu ; et al.	2012-05-10
Method for patterning a photosensitive layer Grant 8,124,323 - Lu , et al. February 28, 2	2012-02-28
Pattern formation in semiconductor fabrication Grant 8,119,533 - Liu , et al. February 21, 2	2012-02-21
Dummy vias for damascene process Grant 7,960,821 - Chen , et al. June 14, 2	2011-06-14
Dummy vias for damascene process Grant 7,767,570 - Chen , et al. August 3, 2	2010-08-03
Dummy Vias For Damascene Process App 20100155963 - Chen; Kuei Shun ; et al.	2010-06-24
Pattern Formation In Semiconductor Fabrication App 20100109054 - Liu; George ; et al.	2010-05-06
Method of pattern formation in semiconductor fabrication Grant 7,648,918 - Liu , et al. January 19, 2	2010-01-19
Semiconductor device having in-chip critical dimension and focus patterns Grant 7,642,101 - Liu , et al. January 5, 2	2010-01-05
Method For Etching An Ultra Thin Film App 20090311628 - Liu; George ; et al.	2009-12-17
Method For Patterning A Photosensitive Layer App 20090081591 - Lu; Hsiao-Tzu ; et al.	2009-03-26
Method Of Pattern Formation In Semiconductor Fabrication App 20090053899 - Liu; George ; et al.	2009-02-26
Immersion lithography process and mask layer structure applied in the same Grant 7,432,042 - Chang , et al. October 7, 2	2008-10-07
Methodology For Implementing Enhanced Optical Lithography For Hole Patterning In Semiconductor Fabrication App 20080204688 - Liu; George ; et al.	2008-08-28
Contrast Enhancing Exposure System and Method For Use In Semiconductor Fabrication App 20080206679 - Liu; George ; et al.	2008-08-28
Method of measuring the overlay accuracy of a multi-exposure process App 20080153012 - Liu; George ; et al.	2008-06-26
Top patterned hardmask and method for patterning Grant 7,387,969 - Liu , et al. June 17, 2	2008-06-17
Semiconductor Device Having In-Chip Critical Dimension and Focus Patterns App 20080128924 - Liu; George ; et al.	2008-06-05
Method and System For Making Photo-Resist Patterns App 20080102648 - Lin; Chin-Hsiang ; et al.	2008-05-01
Dummy Vias For Damascene Process App 20070224795 - CHEN; Kuei Shun ; et al.	2007-09-27
Top patterned hardmask and method for patterning App 20060211254 - Liu; George ; et al.	2006-09-21
Method of measuring the overlay accuracy of a multi-exposure process App 20050244729 - Liu, George ; et al.	2005-11-03
Immersion lithography process and mask layer structure applied in the same App 20050123863 - Chang, Vencent ; et al.	2005-06-09
Sandwich photoresist structure in photolithographic process Grant 6,844,143 - Lin , et al. January 18, 2	2005-01-18
Method for shrinking pattern photoresist App 20040166447 - Chang, Vencent ; et al.	2004-08-26
Method for shrinking the image of photoresist App 20040166448 - Chang, Vencent ; et al.	2004-08-26
Method for planarizing barc layer in dual damascene process Grant 6,680,252 - Chen , et al. January 20, 2	2004-01-20
Sandwich photoresist structure in phtotlithographic process App 20040009434 - Lin, Benjamin Szu-Min ; et al.	2004-01-15
Method for planarizing barc layer in dual damascene process App 20020173152 - Chen, Anseime ; et al.	2002-11-21

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