| Patent | Date |
|---|
Apparatus And Method To Prevent Integrated Circuit From Entering Latch-up Mode
App 20200135856 - Chang; Shunhua T. ; et al. | 2020-04-30 |
Apparatus and method to prevent integrated circuit from entering latch-up mode
Grant 10,636,872 - Chang , et al. | 2020-04-28 |
Transmission line pulse and very fast transmission line pulse reflection control
Grant 9,684,029 - Chang , et al. June 20, 2 | 2017-06-20 |
Cancellation of secondary reverse reflections in a very-fast transmission line pulse system
Grant 9,377,496 - Chang , et al. June 28, 2 | 2016-06-28 |
Transmission Line Pulse And Very Fast Transmission Line Pulse Reflection Control
App 20160097804 - Chang; Shunhua T. ; et al. | 2016-04-07 |
Cancellation of secondary reverse reflections in a very-fast transmission line pulse system
Grant 9,274,155 - Chang , et al. March 1, 2 | 2016-03-01 |
Cancellation Of Secondary Reverse Reflections In A Very-fast Transmission Line Pulse System
App 20160018452 - CHANG; Shunhua T. ; et al. | 2016-01-21 |
Low leakage, low capacitance electrostatic discharge (ESD) silicon controlled recitifer (SCR), methods of manufacture and design structure
Grant 8,796,731 - Abou-Khalil , et al. August 5, 2 | 2014-08-05 |
Robust ESD protection circuit, method and design structure for tolerant and failsafe designs
Grant 8,760,827 - Campi, Jr. , et al. June 24, 2 | 2014-06-24 |
Electrostatic discharge power clamp with a JFET based RC trigger circuit
Grant 8,730,624 - Chang , et al. May 20, 2 | 2014-05-20 |
Cancellation Of Secondary Reverse Reflections In A Very-fast Transmission Line Pulse System
App 20140084950 - CHANG; Shunhua T. ; et al. | 2014-03-27 |
Silicon controlled rectifier based electrostatic discharge protection circuit with integrated JFETs, method of operation and design structure
Grant 8,634,172 - Campi, Jr. , et al. January 21, 2 | 2014-01-21 |
ESD field-effect transistor and integrated diffusion resistor
Grant 8,513,738 - Campi, Jr. , et al. August 20, 2 | 2013-08-20 |
Electrical overstress protection circuit
Grant 8,363,367 - Campi, Jr. , et al. January 29, 2 | 2013-01-29 |
Esd Field-effect Transistor And Integrated Diffusion Resistor
App 20130020645 - Campi, JR.; John B. ; et al. | 2013-01-24 |
Vertical Npnp Structure In A Triple Well Cmos Process
App 20130009207 - Campi, JR.; John B. ; et al. | 2013-01-10 |
Low trigger voltage electrostatic discharge NFET in triple well CMOS technology
Grant 8,350,329 - Campi, Jr. , et al. January 8, 2 | 2013-01-08 |
Scr/mos Clamp For Esd Protection Of Integrated Circuits
App 20120305984 - Campi, JR.; John B. ; et al. | 2012-12-06 |
Electrostatic Discharge Power Clamp With A Jfet Based Rc Trigger Circuit
App 20120250195 - Chang; Shunhua T. ; et al. | 2012-10-04 |
Vertical NPNP Structure In a Triple Well CMOS Process
App 20120126285 - Campi, JR.; John B. ; et al. | 2012-05-24 |
Signal and power supply integrated ESD protection device
Grant 8,169,760 - Chang , et al. May 1, 2 | 2012-05-01 |
Low trigger voltage electrostatic discharge NFET in triple well CMOS technology
App 20120091530 - Campi, JR.; John B. ; et al. | 2012-04-19 |
Low Leakage, Low Capacitance Electrostatic Discharge (esd) Silicon Controlled Recitifer (scr), Methods Of Manufacture And Design Structure
App 20120043583 - ABOU-KHALIL; Michel J. ; et al. | 2012-02-23 |
Silicon Controlled Rectifier Based Electrostatic Discharge Protection Circuit With Integrated JFETS, Method Of Operation And Design Structure
App 20110286135 - CAMPI, JR.; John B. ; et al. | 2011-11-24 |
Robust Esd Protection Circuit, Method And Design Structure For Tolerant And Failsafe Designs
App 20100265622 - CAMPI, JR.; John B. ; et al. | 2010-10-21 |
Electrical Overstress Protection Circuit
App 20100246076 - Campi, JR.; John B. ; et al. | 2010-09-30 |
Signal And Power Supply Integrated Esd Protection Device
App 20100181621 - Chang; Shunhua T. ; et al. | 2010-07-22 |
Active ESD Protection
App 20070297105 - Brennan; Ciaran J. ; et al. | 2007-12-27 |
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