loadpatents
name:-0.054817914962769
name:-0.053071975708008
name:-0.0081379413604736
CHANG; Peter L.D. Patent Filings

CHANG; Peter L.D.

Patent Applications and Registrations

Patent applications and USPTO patent grants for CHANG; Peter L.D..The latest application filed is for "floating body memory cell having gates favoring different conductivity type regions".

Company Profile
7.49.53
  • CHANG; Peter L.D. - Portland OR
  • Chang; Peter L. D. - San Jose CA
  • Chang; Peter L.D. - Porland OR
  • Chang; Peter L. D. - Nashua NH
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Floating Body Memory Cell Having Gates Favoring Different Conductivity Type Regions
App 20210159228 - CHANG; Peter L.D. ;   et al.
2021-05-27
Floating body memory cell having gates favoring different conductivity type regions
Grant 10,916,547 - Chang , et al. February 9, 2
2021-02-09
Silicon photonics using off-cut wafer having top-side vertical outcoupler from etched cavity
Grant 10,823,912 - Pelc , et al. November 3, 2
2020-11-03
Floating Body Memory Cell Having Gates Favoring Different Conductivity Type Regions
App 20200312854 - CHANG; Peter L.D. ;   et al.
2020-10-01
Floating body memory cell having gates favoring different conductivity type regions
Grant 10,720,434 - Chang , et al.
2020-07-21
Floating Body Memory Cell Having Gates Favoring Different Conductivity Type Regions
App 20190386007 - CHANG; Peter L.D. ;   et al.
2019-12-19
Floating body memory cell having gates favoring different conductivity type regions
Grant 10,381,350 - Chang , et al. A
2019-08-13
Floating Body Memory Cell Having Gates Favoring Different Conductivity Type Regions
App 20190035790 - CHANG; Peter L.D. ;   et al.
2019-01-31
Floating body memory cell having gates favoring different conductivity type regions
Grant 10,121,792 - Chang , et al. November 6, 2
2018-11-06
Floating Body Memory Cell Having Gates Favoring Different Conductivity Type Regions
App 20180226407 - CHANG; Peter L.D. ;   et al.
2018-08-09
Low cost integration of optical components in planar lightwave circuits
Grant 9,939,578 - Chang , et al. April 10, 2
2018-04-10
Floating body memory cell having gates favoring different conductivity type regions
Grant 9,786,667 - Chang , et al. October 10, 2
2017-10-10
Floating Body Memory Cell Having Gates Favoring Different Conductivity Type Regions
App 20170207222 - Chang; Peter L. D. ;   et al.
2017-07-20
Floating body memory cell having gates favoring different conductivity type regions
Grant 9,646,970 - Chang , et al. May 9, 2
2017-05-09
Floating Body Memory Cell Having Gates Favoring Different Conductivity Type Regions
App 20170062434 - Chang; Peter L. D. ;   et al.
2017-03-02
Floating body memory cell having gates favoring different conductivity type regions
Grant 9,520,399 - Chang , et al. December 13, 2
2016-12-13
Floating Body Memory Cell Having Gates Favoring Different Conductivity Type Regions
App 20160322360 - Chang; Peter L. D. ;   et al.
2016-11-03
Floating body memory cell having gates favoring different conductivity type regions
Grant 9,418,997 - Chang , et al. August 16, 2
2016-08-16
Floating Body Memory Cell Having Gates Favoring Different Conductivity Type Regions
App 20160155742 - Chang; Peter L. D. ;   et al.
2016-06-02
Floating body memory cell having gates favoring different conductivity type regions
Grant 9,275,999 - Chang , et al. March 1, 2
2016-03-01
Electro-optical assembly including a glass bridge
Grant 9,250,406 - Chang , et al. February 2, 2
2016-02-02
Floating Body Memory Cell Having Gates Favoring Different Conductivity Type Regions
App 20150179650 - Chang; Peter L. D. ;   et al.
2015-06-25
Floating body memory cell having gates favoring different conductivity type regions
Grant 8,980,707 - Chang , et al. March 17, 2
2015-03-17
Low Cost Integration Of Optical Components In Planar Lightwave Circuits
App 20140334768 - Chang; Peter L.D. ;   et al.
2014-11-13
Electro-optical Assembly Including A Glass Bridge
App 20140177625 - Chang; Peter L.D. ;   et al.
2014-06-26
Floating Body Memory Cell Having Gates Favoring Different Conductivity Type Regions
App 20140015021 - Chang; Peter L. D. ;   et al.
2014-01-16
Floating body memory cell having gates favoring different conductivity type regions
Grant 8,569,812 - Chang , et al. October 29, 2
2013-10-29
Independently accessed double-gate and tri-gate transistors
Grant 8,399,922 - Chang , et al. March 19, 2
2013-03-19
Epitaxial fabrication of fins for FinFET devices
Grant 8,373,217 - Chang February 12, 2
2013-02-12
Independently Accessed Double-gate And Tri-gate Transistors In Same Process Flow
App 20130009248 - Chang; Peter L.D. ;   et al.
2013-01-10
Floating Body Memory Cell Having Gates Favoring Different Conductivity Type Regions
App 20120267721 - Chang; Peter L.D. ;   et al.
2012-10-25
Independently accessed double-gate and tri-gate transistors in same process flow
Grant 8,268,709 - Chang , et al. September 18, 2
2012-09-18
Floating body memory cell having gates favoring different conductivity type regions
Grant 8,217,435 - Chang , et al. July 10, 2
2012-07-10
Expitaxial Fabrication Of Fins For Finfet Devices
App 20110298098 - Chang; Peter L. D.
2011-12-08
Integration of planar and tri-gate devices on the same substrate
Grant 8,058,690 - Chang November 15, 2
2011-11-15
Expitaxial fabrication of fins for FinFET devices
Grant 8,017,463 - Chang September 13, 2
2011-09-13
Tri-gate integration with embedded floating body memory cell using a high-K dual metal gate
Grant 7,968,392 - Ban , et al. June 28, 2
2011-06-28
Integration of a floating body memory on SOI with logic transistors on bulk substrate
Grant 7,880,231 - Chang February 1, 2
2011-02-01
Independently controlled, double gate nanowire memory cell with self-aligned contacts
Grant 7,859,028 - Ban , et al. December 28, 2
2010-12-28
Independently accessed double-gate and tri-gate transistors in same process flow
Grant 7,859,053 - Chang , et al. December 28, 2
2010-12-28
Method and resultant structure for floating body memory on bulk wafer
Grant 7,851,862 - Chang December 14, 2
2010-12-14
Independently Accessed Double-gate And Tri-gate Transistors In Same Process Flow
App 20100297838 - Chang; Peter L.D. ;   et al.
2010-11-25
Self aligned back-gate for floating body cell memory erase
App 20100165772 - Avci; Uygar E. ;   et al.
2010-07-01
Floating body memory array
Grant 7,652,910 - Avci , et al. January 26, 2
2010-01-26
Intergration of a floating body memory on soi with logic transistors on bulk substrate
App 20100006941 - Chang; Peter L.D.
2010-01-14
Integration of a floating body memory on SOI with logic transistors on bulk substrate
Grant 7,592,209 - Chang September 22, 2
2009-09-22
Method and resultant structure for floating body memory on bulk
App 20090224358 - Chang; Peter L.D.
2009-09-10
Self-aligned contacts for transistors
Grant 7,563,701 - Chang , et al. July 21, 2
2009-07-21
Method of preparing active silicon regions for CMOS or other devices
Grant 7,560,358 - Kim , et al. July 14, 2
2009-07-14
Method Of Preparing Active Silicon Regions For Cmos Or Other Devices
App 20090170279 - Kim; Seiyon ;   et al.
2009-07-02
Integration Of Planar And Tri-gate Devices On The Same Substrate
App 20090159975 - Chang; Peter L.D.
2009-06-25
Independently controlled, double gate nanowire memory cell with self-aligned contacts
App 20090146208 - Ban; Ibrahim ;   et al.
2009-06-11
Method and resultant structure for floating body memory on bulk wafer
Grant 7,531,879 - Chang May 12, 2
2009-05-12
Integration of planar and tri-gate devices on the same substrate
Grant 7,512,017 - Chang March 31, 2
2009-03-31
Independently controlled, double gate nanowire memory cell with self-aligned contacts
Grant 7,498,211 - Ban , et al. March 3, 2
2009-03-03
Tri-gate Integration With Embedded Floating Body Memory Cell Using A High-k Dual Metal Gate
App 20090017589 - Ban; Ibrahim ;   et al.
2009-01-15
Floating Body Memory Array
App 20090003050 - Avci; Uygar E. ;   et al.
2009-01-01
Methods for forming semiconductor wires and resulting devices
Grant 7,465,636 - Chang December 16, 2
2008-12-16
Tri-gate integration with embedded floating body memory cell using a high-K dual metal gate
Grant 7,439,588 - Ban , et al. October 21, 2
2008-10-21
Independently accessed double-gate and tri-gate transistors in same process flow
Grant 7,422,946 - Doyle , et al. September 9, 2
2008-09-09
Expitaxial fabrication of fins for FinFET devices
App 20080157130 - Chang; Peter L.D.
2008-07-03
Floating body memory cell having gates favoring different conductivity type regions
App 20080149984 - Chang; Peter L.D. ;   et al.
2008-06-26
Method and resultant structure for floating body memory on bulk wafer
App 20080150075 - Chang; Peter L.D.
2008-06-26
Isolated Semiconductor Device Structures
App 20080128759 - Chang; Peter L.D.
2008-06-05
Integration of a floating body memory on SOI with logic transistors on bulk substrate
App 20080111190 - Chang; Peter L.D.
2008-05-15
Gate-assisted silicon-on-insulator on bulk wafer and its application to floating body cell memory and transistors
App 20080090348 - Chang; Peter L. D. ;   et al.
2008-04-17
Isolating semiconductor device structures
Grant 7,335,583 - Chang February 26, 2
2008-02-26
Memory with split gate devices and method of fabrication
Grant 7,332,779 - Chang February 19, 2
2008-02-19
Methods for forming semiconductor wires and resulting devices
Grant 7,319,252 - Chang January 15, 2
2008-01-15
Static random access memory using independent double gate transistors
App 20070232002 - Chang; Peter L. D.
2007-10-04
Methods for forming semiconductor wires and resulting devices
App 20070187731 - Chang; Peter L.D.
2007-08-16
Independently controlled, double gate nanowire memory cell with self-aligned contacts
App 20070148857 - Ban; Ibrahim ;   et al.
2007-06-28
Integration of planar and tri-gate devices on the same substrate
App 20070138514 - Chang; Peter L.D.
2007-06-21
Tri-gate integration with embedded floating body memory cell using a high-K dual metal gate
App 20070131983 - Ban; Ibrahim ;   et al.
2007-06-14
Memory cell using silicon carbide
Grant 7,132,751 - Chang November 7, 2
2006-11-07
Self-aligned contacts for transistors
App 20060223302 - Chang; Peter L.D. ;   et al.
2006-10-05
Memory with split gate devices and method of fabrication
App 20060125011 - Chang; Peter L.D.
2006-06-15
Independently accessed double-gate and tri-gate transistors in same process flow
App 20060128131 - Chang; Peter L.D. ;   et al.
2006-06-15
Memory with split gate devices and method of fabrication
Grant 7,049,654 - Chang May 23, 2
2006-05-23
Independently accessed double-gate and tri-gate transistors in same process flow
Grant 7,037,790 - Chang , et al. May 2, 2
2006-05-02
Method for isolating semiconductor device structures and structures thereof
App 20060073694 - Chang; Peter L.D.
2006-04-06
Independently accessed double-gate and tri-gate transistors in same process flow
App 20060071299 - Doyle; Brian S. ;   et al.
2006-04-06
Independently accessed double-gate and tri-gate transistors in same process flow
App 20060068550 - Chang; Peter L.D. ;   et al.
2006-03-30
Methods for forming semiconductor wires and resulting devices
App 20050285149 - Chang, Peter L.D.
2005-12-29
Methods for forming semiconductor wires and resulting devices
App 20050285160 - Chang, Peter L.D.
2005-12-29
Memory cell using silicon carbide
App 20050280001 - Chang, Peter L.D.
2005-12-22
Memory with split gate devices and method of fabrication
App 20050224878 - Chang, Peter L.D.
2005-10-13
Dual mode energy detector having monolithic integrated circuit construction
Grant 5,436,453 - Chang , et al. July 25, 1
1995-07-25

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed