Patent | Date |
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Field effect transistors with negative capacitance layers Grant 11,437,371 - Yang , et al. September 6, 2 | 2022-09-06 |
Power Rails For Stacked Semiconductor Device App 20220270935 - YANG; Chansyun David ;   et al. | 2022-08-25 |
Plasma-assisted Etching Of Metal Oxides App 20220216064 - YANG; Chansyun David ;   et al. | 2022-07-07 |
Radical-activated Etching Of Metal Oxides App 20220199457 - YANG; Chansyun David ;   et al. | 2022-06-23 |
Interposer with capacitors Grant 11,367,695 - Chang , et al. June 21, 2 | 2022-06-21 |
Power rails for stacked semiconductor device Grant 11,335,606 - Yang , et al. May 17, 2 | 2022-05-17 |
Plasma-assisted etching of metal oxides Grant 11,282,711 - Yang , et al. March 22, 2 | 2022-03-22 |
Radical-activated etching of metal oxides Grant 11,276,604 - Yang , et al. March 15, 2 | 2022-03-15 |
Power Rails For Stacked Semiconductor Device App 20220059414 - YANG; Chansyun David ;   et al. | 2022-02-24 |
Plasma-assisted Etching Of Metal Oxides App 20220037163 - YANG; Chansyun David ;   et al. | 2022-02-03 |
Laser Interference Fringe Control For Higher Euv Light Source And Euv Throughput App 20220035253 - YANG; Chansyun David ;   et al. | 2022-02-03 |
Heat Dissipation In Semiconductor Packages And Methods Of Forming Same App 20220028842 - Chang; Fong-yuan ;   et al. | 2022-01-27 |
Field Effect Transistors With Negative Capacitance Layers App 20220013652 - Yang; Chansyun David ;   et al. | 2022-01-13 |
Field Effect Transistor With Negative Capacitance Dielectric Structures App 20210384323 - YANG; Chansyun David ;   et al. | 2021-12-09 |
Stacked Semiconductor Device App 20210376137 - YANG; Chansyun David ;   et al. | 2021-12-02 |
Laser interference fringe control for higher EUV light source and EUV throughput Grant 11,150,559 - Yang , et al. October 19, 2 | 2021-10-19 |
Field effect transistor with negative capacitance dieletric structures Grant 11,114,547 - Yang , et al. September 7, 2 | 2021-09-07 |
Laser Interference Fringe Control For Higher Euv Light Source And Euv Throughput App 20210200102 - YANG; Chansyun David ;   et al. | 2021-07-01 |
Field Effect Transistor With Negative Capacitance Dieletric Structures App 20210083074 - YANG; Chansyun David ;   et al. | 2021-03-18 |
Interposer With Capacitors App 20200043873 - CHANG; Fong-yuan ;   et al. | 2020-02-06 |
Accurate capacitance measurement for ultra large scale integrated circuits Grant 8,115,500 - Doong , et al. February 14, 2 | 2012-02-14 |
Accurate Capacitance Measurement for Ultra Large Scale Integrated Circuits App 20110168995 - Doong; Yih-Yuh ;   et al. | 2011-07-14 |
Accurate capacitance measurement for ultra large scale integrated circuits Grant 7,880,494 - Doong , et al. February 1, 2 | 2011-02-01 |
Accurate capacitance measurement for ultra large scale integrated circuits Grant 7,772,868 - Doong , et al. August 10, 2 | 2010-08-10 |
Accurate Capacitance Measurement for Ultra Large Scale Integrated Circuits App 20100156453 - Doong; Yih-Yuh ;   et al. | 2010-06-24 |
Accurate Capacitance Measurement for Ultra Large Scale Integrated Circuits App 20090002012 - Doong; Yih-Yuh ;   et al. | 2009-01-01 |
Shield Structures App 20070257339 - Chen; Hsien-Wei ;   et al. | 2007-11-08 |
Method and system for extraction of parasitic interconnect impedance including inductance Grant 6,643,831 - Chang , et al. November 4, 2 | 2003-11-04 |
Method and system for extraction of parasitic interconnect impedance including inductance App 20020104063 - Chang, Keh-Jeng ;   et al. | 2002-08-01 |
Method for determining on-chip sheet resistivity Grant 6,403,389 - Chang , et al. June 11, 2 | 2002-06-11 |
Method and system for extraction of parasitic interconnect impedance including inductance Grant 6,381,730 - Chang , et al. April 30, 2 | 2002-04-30 |
Methods for determining on-chip interconnect process parameters Grant 6,312,963 - Chou , et al. November 6, 2 | 2001-11-06 |
Methods for determining on-chip interconnect process parameters Grant 6,057,171 - Chou , et al. May 2, 2 | 2000-05-02 |
System and method for extracting parasitic impedance from an integrated circuit layout Grant 5,901,063 - Chang , et al. May 4, 1 | 1999-05-04 |
Computer-aided design methods and apparatus for multilevel interconnect technologies Grant 5,610,833 - Chang , et al. March 11, 1 | 1997-03-11 |