Chang; Hsin

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chang; Hsin.The latest application filed is for "alignment marks in substrate having through-substrate via (tsv)".

Company Profile

4.14.11

Chang; Hsin - Hsinchu TW
Chang; Hsin - Hsin-Chu TW
Chang; Hsin - Hsinchu City TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Alignment marks in substrate having through-substrate via (TSV) Grant 10,910,267 - Chang , et al. February 2, 2	2021-02-02
Alignment Marks in Substrate Having Through-Substrate Via (TSV) App 20200321249 - Chang; Hsin ; et al.	2020-10-08
Alignment marks in substrate having through-substrate via (TSV) Grant 10,692,764 - Chang , et al.	2020-06-23
Alignment Marks in Substrate Having Through-Substrate Via (TSV) App 20190131172 - Chang; Hsin ; et al.	2019-05-02
Alignment marks in substrate having through-substrate via (TSV) Grant 10,163,706 - Chang , et al. Dec	2018-12-25
Chip-on-wafer structures and methods for forming the same Grant 9,123,643 - Lin , et al. September 1, 2	2015-09-01
Reconfigurable guide pin design for centering wafers having different sizes Grant 9,099,515 - Chang , et al. August 4, 2	2015-08-04
Chip-on-Wafer Structures and Methods for Forming the Same App 20150130055 - Lin; Jing-Cheng ; et al.	2015-05-14
Alignment Marks in Substrate Having Through-Substrate Via (TSV) App 20150118840 - Chang; Hsin ; et al.	2015-04-30
Chip-on-wafer structures and methods for forming the same Grant 8,962,481 - Lin , et al. February 24, 2	2015-02-24
Alignment marks in substrate having through-substrate via (TSV) Grant 8,928,159 - Chang , et al. January 6, 2	2015-01-06
Chip-on-Wafer Structures and Methods for Forming the Same App 20140134802 - Lin; Jing-Cheng ; et al.	2014-05-15
Chip-on-Wafer structures and methods for forming the same Grant 8,643,148 - Lin , et al. February 4, 2	2014-02-04
Reconfigurable Guide Pin Design for Centering Wafers Having Different Sizes App 20130334832 - Chang; Hsin ; et al.	2013-12-19
Reconfigurable guide pin design for centering wafers having different sizes Grant 8,567,837 - Chang , et al. October 29, 2	2013-10-29
Chip-on-Wafer Structures and Methods for Forming the Same App 20130134559 - Lin; Jing-Cheng ; et al.	2013-05-30
Reconfigurable Guide Pin Design for Centering Wafers Having Different Sizes App 20120128457 - Chang; Hsin ; et al.	2012-05-24
Alignment Marks in Substrate Having Through-Substrate Via (TSV) App 20120056315 - Chang; Hsin ; et al.	2012-03-08
Method and apparatus for removing particles in immersion lithography Grant 7,800,731 - Chang , et al. September 21, 2	2010-09-21
Method and system for closing plate take-over in immersion lithography Grant 7,728,952 - Fu , et al. June 1, 2	2010-06-01
Method and Apparatus For Removing Particles in Immersion Lithography App 20080106709 - Chang; Hsin ; et al.	2008-05-08

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.