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Semiconductor device and fabricating the same Grant 8,901,607 - Wang , et al. December 2, 2 | 2014-12-02 |
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Method Of Merging Color Sets Of Layout App 20140101623 - CHEN; Pi-Tsung ;   et al. | 2014-04-10 |
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IC design flow enhancement with CMP simulation Grant 8,336,002 - Chang , et al. December 18, 2 | 2012-12-18 |
Accurate Parasitic Capacitance Extraction for Ultra Large Scale Integrated Circuits App 20120260225 - Su; Ke-Ying ;   et al. | 2012-10-11 |
3-dimensional device design layout Grant 8,286,114 - Chuang , et al. October 9, 2 | 2012-10-09 |
Routing system and method for double patterning technology Grant 8,239,806 - Chen , et al. August 7, 2 | 2012-08-07 |
Performance-aware logic operations for generating masks Grant 8,227,869 - Lu , et al. July 24, 2 | 2012-07-24 |
Accurate parasitic capacitance extraction for ultra large scale integrated circuits Grant 8,214,784 - Su , et al. July 3, 2 | 2012-07-03 |
System and method for design-for-manufacturability data encryption Grant 8,136,168 - Cheng , et al. March 13, 2 | 2012-03-13 |
Performance-Aware Logic Operations for Generating Masks App 20120043618 - Lu; Lee-Chung ;   et al. | 2012-02-23 |
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Methods for Double-Patterning-Compliant Standard Cell Design App 20110193234 - Chen; Huang-Yu ;   et al. | 2011-08-11 |
Place-and-route layout method with same footprint cells Grant 7,966,596 - Lu , et al. June 21, 2 | 2011-06-21 |
Routing System And Method For Double Patterning Technology App 20110119648 - Chen; Huang-Yu ;   et al. | 2011-05-19 |
System, method, and computer program product for matching cell layout of an integrated circuit design Grant 7,904,844 - Chang , et al. March 8, 2 | 2011-03-08 |
Accurate Parasitic Capacitance Extraction for Ultra Large Scale Integrated Circuits App 20110023003 - Su; Ke-Ying ;   et al. | 2011-01-27 |
Accurate parasitic capacitance extraction for ultra large scale integrated circuits Grant 7,818,698 - Su , et al. October 19, 2 | 2010-10-19 |
Method for smart dummy insertion to reduce run time and dummy count Grant 7,801,717 - Chang , et al. September 21, 2 | 2010-09-21 |
Method for optimally converting a circuit design into a semiconductor device Grant 7,797,668 - Chang , et al. September 14, 2 | 2010-09-14 |
System, method, and computer program product for matching cell layout of an integrated circuit design Grant 7,788,612 - Chang , et al. August 31, 2 | 2010-08-31 |
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Integrated Circuit Design Usage And Sanity Verification App 20080244483 - Chang; Gwan Sin ;   et al. | 2008-10-02 |
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Method For Smart Dummy Insertion To Reduce Run Time And Dummy Count App 20080176343 - Chang; Gwan Sin ;   et al. | 2008-07-24 |
IC Design Flow Enhancement With CMP Simulation App 20070266356 - Chang; Gwan Sin ;   et al. | 2007-11-15 |
System and Method for Design-for-Manufacturability Data Encryption App 20070266248 - Cheng; Yi-Kan ;   et al. | 2007-11-15 |
Method for optimally converting a circuit design into a semiconductor device App 20070006117 - Chang; Gwan Sin ;   et al. | 2007-01-04 |