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Chang; Chia-Lung Patent Filings

Chang; Chia-Lung

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chang; Chia-Lung.The latest application filed is for "method of forming dielectric layer by organic dielectric layer".

Company Profile
21.26.25
  • Chang; Chia-Lung - Tainan TW
  • Chang; Chia-Lung - Tainan City TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method for fabricating semiconductor device
Grant 10,903,328 - Chen , et al. January 26, 2
2021-01-26
Method of forming stacked structure of memory
Grant 10,811,272 - Liu , et al. October 20, 2
2020-10-20
Method of forming a stop layer filling in a space between spacers
Grant 10,790,289 - Liu , et al. September 29, 2
2020-09-29
Semiconductor device including bit line structure of dynamic random access memory (DRAM) and method for fabricating the same
Grant 10,770,464 - Liu , et al. Sep
2020-09-08
Method Of Forming Dielectric Layer By Organic Dielectric Layer
App 20200227269 - Liu; Wei-Hsin ;   et al.
2020-07-16
Manufacturing method of semiconductor memory device
Grant 10,672,864 - Wu , et al.
2020-06-02
Method of forming isolation structure
Grant 10,643,883 - Chen , et al.
2020-05-05
Method Of Forming Isolation Structure
App 20200075397 - Chen; Po-Chun ;   et al.
2020-03-05
Semiconductor Structure With A Conductive Line And Fabricating Method Of A Stop Layer
App 20200020693 - Liu; Chih-Chien ;   et al.
2020-01-16
Fabricating method of oxide layer within peripheral circuit region
Grant 10,535,664 - Chen , et al. Ja
2020-01-14
Fabricating Method Of Oxide Layer Within Peripheral Circuit Region
App 20190363093 - Chen; Po-Chun ;   et al.
2019-11-28
Method for manufacturing a semiconductor device with a cobalt silicide film
Grant 10,475,900 - Chang , et al. Nov
2019-11-12
Semiconductor structure with a conductive line and fabricating method of a stop layer
Grant 10,468,417 - Liu , et al. No
2019-11-05
Semiconductor Structure With A Conductive Line And Fabricating Method Of A Stop Layer
App 20190287976 - Liu; Chih-Chien ;   et al.
2019-09-19
Method For Fabricating Semiconductor Device
App 20190280095 - Chen; Po-Chun ;   et al.
2019-09-12
Semiconductor Device And Method For Fabricating The Same
App 20190221570 - Liu; Chih-Chien ;   et al.
2019-07-18
Manufacturing Method Of Semiconductor Memory Device
App 20190206982 - Wu; Tzu-Chin ;   et al.
2019-07-04
Memory devices and method of manufacturing the same
Grant 10,332,888 - Liu , et al.
2019-06-25
Method for forming amorphous silicon multuple layer structure
Grant 10,312,080 - Chen , et al.
2019-06-04
Memory Devices And Method Of Manufacturing The Same
App 20190148382 - Liu; Chih-Chien ;   et al.
2019-05-16
Semiconductor memory device and manufacturing method thereof
Grant 10,276,650 - Wu , et al.
2019-04-30
Method for forming semiconductor device
Grant 10,262,895 - Chen , et al.
2019-04-16
Semiconductor structure
Grant 10,249,706 - Chang , et al.
2019-04-02
Semiconductor Memory Device And Manufacturing Method Thereof
App 20180308923 - Wu; Tzu-Chin ;   et al.
2018-10-25
Method of fabricating metal-insulator-metal capacitor
Grant 10,079,277 - Yew , et al. September 18, 2
2018-09-18
Method For Manufacturing A Semiconductor Device With A Cobalt Silicide Film
App 20180212034 - Chang; Kai-Jiun ;   et al.
2018-07-26
Method For Forming Amorphous Silicon Multuple Layer Structure
App 20180190488 - Chen; Mei-Ling ;   et al.
2018-07-05
Method For Forming Semiconductor Device
App 20180190658 - Chen; Mei-Ling ;   et al.
2018-07-05
Bit Line Gate Structure Of Dynamic Random Access Memory (dram) And Forming Method Thereof
App 20180190662 - Wu; Tzu-Chin ;   et al.
2018-07-05
Method Of Fabricating Metal-insulator-metal Capacitor
App 20180151666 - Yew; Tri-Rung ;   et al.
2018-05-31
Dynamic random access memory device
Grant 9,754,943 - Chang , et al. September 5, 2
2017-09-05
Semiconductor process
Grant 9,034,726 - Liu , et al. May 19, 2
2015-05-19
Manufacturing method for a shallow trench isolation
Grant 9,012,300 - Sie , et al. April 21, 2
2015-04-21
Method of fabricating dielectric layer and shallow trench isolation
Grant 8,927,388 - Chen , et al. January 6, 2
2015-01-06
Semiconductor Process
App 20140256115 - Liu; Chih-Chien ;   et al.
2014-09-11
Method For Forming Isolation Structure
App 20140213034 - Chang; Chia-Lung ;   et al.
2014-07-31
Semiconductor structure and process thereof
Grant 8,772,904 - Liu , et al. July 8, 2
2014-07-08
Method Of Fabricating Dielectric Layer And Shallow Trench Isolation
App 20140134824 - Chen; Jei-Ming ;   et al.
2014-05-15
Method of forming an isolation structure
Grant 8,709,901 - Chang , et al. April 29, 2
2014-04-29
Manufacturing Method For A Shallow Trench Isolation
App 20140094017 - Sie; Wu-Sian ;   et al.
2014-04-03
Metal Oxide Semiconductor Transistor
App 20140035070 - Lu; Tsuo-Wen ;   et al.
2014-02-06
Semiconductor Structure And Process Thereof
App 20130334650 - Liu; Chih-Chien ;   et al.
2013-12-19
Metal oxide semiconductor transistor and method of manufacturing the same
Grant 8,580,625 - Lu , et al. November 12, 2
2013-11-12
Manufacturing method for metal gate using ion implantation
Grant 8,536,038 - Wang , et al. September 17, 2
2013-09-17
Metal Oxide Semiconductor Transistor And Method Of Manufacturing The Same
App 20130020657 - LU; Tsuo-Wen ;   et al.
2013-01-24
Manufacturing Method For Metal Gate
App 20120329261 - Wang; Shao-Wei ;   et al.
2012-12-27

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