| Patent | Date |
|---|
Stacked silicon package assembly having thermal management
Grant 11,355,412 - Gandhi , et al. June 7, 2 | 2022-06-07 |
Integrated circuit device with stacked dies having mirrored circuitry
Grant 11,205,639 - Kim , et al. December 21, 2 | 2021-12-21 |
Stacked silicon package assembly having thermal management
Grant 11,145,566 - Refai-Ahmed , et al. October 12, 2 | 2021-10-12 |
IC die with dummy structures
Grant 11,114,344 - Lin , et al. September 7, 2 | 2021-09-07 |
Integrated Circuit Device With Stacked Dies Having Mirrored Circuitry
App 20210265312 - KIM; Myongseob ; et al. | 2021-08-26 |
Stacked Silicon Package Assembly Having Thermal Management
App 20210249328 - REFAI-AHMED; Gamal ; et al. | 2021-08-12 |
Test circuits for testing a die stack
Grant 11,054,461 - Chong , et al. July 6, 2 | 2021-07-06 |
Stacked Silicon Package Assembly Having Vertical Thermal Management
App 20210193620 - Refai-Ahmed; Gamal ; et al. | 2021-06-24 |
Package Integration For Memory Devices
App 20200303341 - Kim; Myongseob ; et al. | 2020-09-24 |
Package integration for memory devices
Grant 10,770,430 - Kim , et al. Sep | 2020-09-08 |
Chip package assembly with modular core dice
Grant 10,692,837 - Kim , et al. | 2020-06-23 |
Stacked Silicon Package Assembly Having Thermal Management
App 20200105642 - Gandhi; Jaspreet Singh ; et al. | 2020-04-02 |
Wafer edge partial die engineered for stacked die yield
Grant 10,431,565 - Kim , et al. O | 2019-10-01 |
In-die transistor characterization in an IC
Grant 10,379,155 - Yeh , et al. A | 2019-08-13 |
Circuit for and method of testing bond connections between a first die and a second die
Grant 10,262,911 - Gong , et al. | 2019-04-16 |
Method and design of low sheet resistance MEOL resistors
Grant 10,103,139 - Chong , et al. October 16, 2 | 2018-10-16 |
Method and apparatus for assembling and testing a multi-integrated circuit package
Grant 10,096,502 - Refai-Ahmed , et al. October 9, 2 | 2018-10-09 |
Method And Apparatus For Assembling And Testing A Multi-integrated Circuit Package
App 20180144963 - Refai-Ahmed; Gamal ; et al. | 2018-05-24 |
Method And Design Of Low Sheet Resistance Meol Resistors
App 20170012041 - Chong; Nui ; et al. | 2017-01-12 |
Shielded wire arrangement for die testing
Grant 9,412,674 - Kim , et al. August 9, 2 | 2016-08-09 |
In-die Transistor Characterization In An Ic
App 20160097805 - Yeh; Ping-Chin ; et al. | 2016-04-07 |
Method of testing a semiconductor structure
Grant 8,810,269 - Gong , et al. August 19, 2 | 2014-08-19 |
Methods of manufacturing a semiconductor structure
Grant 8,802,454 - Rahman , et al. August 12, 2 | 2014-08-12 |
Method Of Testing A Semiconductor Structure
App 20140091819 - Gong; Yuqing ; et al. | 2014-04-03 |
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