Chanana; Mohit
Patent Applications and Registrations
Patent applications and USPTO patent grants for Chanana; Mohit.The latest application filed is for "read assist circuitry for memory applications".
- Chanana; Mohit - New Delhi IN
| Patent | Date |
|---|---|
| Methods and apparatuses of configurable integrated circuits Grant 11,017,142 - Chen , et al. May 25, 2 | 2021-05-25 |
| Read assist circuitry for memory applications Grant 10,515,684 - Chanana , et al. Dec | 2019-12-24 |
| Read Assist Circuitry for Memory Applications App 20190164590 - Chanana; Mohit ; et al. | 2019-05-30 |
| Method, system and circuit for staggered boost injection Grant 10,229,731 - Goel , et al. | 2019-03-12 |
| Boost circuit for memory Grant 10,199,092 - Chanana , et al. Fe | 2019-02-05 |
| Boost Circuit for Memory App 20170365331 - Chanana; Mohit ; et al. | 2017-12-21 |
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