Chan; Yuen H.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chan; Yuen H..The latest application filed is for "dual mode operation having power saving and active modes in a stacked circuit topology with logic preservation".

Company Profile

0.54.45

Chan; Yuen H. - Poughkeepsie NY
Chan; Yuen H. - Poughkeepise NY
Chan; Yuen H. - Wappingers Falls NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Dual mode operation having power saving and active modes in a stacked circuit topology with logic preservation Grant 9,997,218 - Bunce , et al. June 12, 2	2018-06-12
Dual Mode Operation Having Power Saving And Active Modes In A Stacked Circuit Topology With Logic Preservation App 20180005674 - BUNCE; PAUL A. ; et al.	2018-01-04
Automated stressing and testing of semiconductor memory cells Grant 9,837,142 - Chan , et al. December 5, 2	2017-12-05
Automated stressing and testing of semiconductor memory cells Grant 9,805,823 - Chan , et al. October 31, 2	2017-10-31
Managing semiconductor memory array leakage current Grant 9,792,967 - Bunce , et al. October 17, 2	2017-10-17
Dual mode operation having power saving and active modes in a stacked circuit topology with logic preservation Grant 9,786,339 - Bunce , et al. October 10, 2	2017-10-10
Managing semiconductor memory array leakage current Grant 9,761,289 - Bunce , et al. September 12, 2	2017-09-12
Dual Mode Operation Having Power Saving And Active Modes In A Stacked Circuit Topology With Logic Preservation App 20170243619 - BUNCE; PAUL A. ; et al.	2017-08-24
Memory circuit Grant 9,711,244 - Chan , et al. July 18, 2	2017-07-18
High frequency write through memory device Grant 9,355,692 - Bunce , et al. May 31, 2	2016-05-31
Write/read priority blocking scheme using parallel static address decode path Grant 9,281,024 - Bunce , et al. March 8, 2	2016-03-08
Write/read priority blocking scheme using parallel static address decode path Grant 9,281,025 - Bunce , et al. March 8, 2	2016-03-08
Write/read Priority Blocking Scheme Using Parallel Static Address Decode Path App 20150302902 - Bunce; Paul A. ; et al.	2015-10-22
Write/read Priority Blocking Scheme Using Parallel Static Address Decode Path App 20150302908 - Bunce; Paul A. ; et al.	2015-10-22
SRAM supply voltage global bitline precharge pulse Grant 9,070,433 - Bunce , et al. June 30, 2	2015-06-30
High Frequency Memory App 20140078835 - Bunce; Paul A. ; et al.	2014-03-20
Global bit line restore by most significant bit of an address line Grant 8,587,990 - Chan , et al. November 19, 2	2013-11-19
Dual beta ratio SRAM Grant 8,339,893 - Chan , et al. December 25, 2	2012-12-25
Programmable control clock circuit including scan mode Grant 8,299,833 - Bunce , et al. October 30, 2	2012-10-30
Low power programmable clock delay generator with integrated decode function Grant 8,237,481 - Chan , et al. August 7, 2	2012-08-07
Single clock dynamic compare circuit Grant 8,233,331 - Chan , et al. July 31, 2	2012-07-31
Global Bit Line Restore By Most Significant Bit Of An Address Line App 20120008379 - CHAN; Yuen H. ; et al.	2012-01-12
Method and Circuit Arrangement for Performing a Write Through Operation, and SRAM Array With Write Through Capability App 20110317478 - Chan; Yuen H. ; et al.	2011-12-29
Interleave Memory Array Arrangement App 20110310680 - Chan; Yuen H. ; et al.	2011-12-22
Programmable Control Clock Circuit Including Scan Mode App 20110304370 - Bunce; Paul A. ; et al.	2011-12-15
Single Clock Dynamic Compare Circuit App 20110298500 - Chan; Yuen H. ; et al.	2011-12-08
High performance pseudo dynamic 36 bit compare Grant 7,996,620 - Chan , et al. August 9, 2	2011-08-09
Enhanced programmable pulsewidth modulating circuit for array clock generation Grant 7,936,638 - Chan , et al. May 3, 2	2011-05-03
Dual Beta Ratio SRAM App 20110075504 - Chan; Yuen H. ; et al.	2011-03-31
Programmable voltage divider Grant 7,873,891 - Chan , et al. January 18, 2	2011-01-18
Enhanced Programmable Pulsewidth Modulating Circuit For Array Clock Generation App 20100302895 - Chan; Yuen H. ; et al.	2010-12-02
Integrated circuit chip with improved array stability Grant 7,787,284 - Chan , et al. August 31, 2	2010-08-31
Programmable local clock buffer capable of varying initial settings Grant 7,613,944 - Chan , et al. November 3, 2	2009-11-03
Low Power Programmable Clock Delay Generator with Integrated Decode Function App 20090267667 - Chan; Yuen H. ; et al.	2009-10-29
Eight transistor SRAM cell with improved stability requiring only one word line Grant 7,606,060 - Chan , et al. October 20, 2	2009-10-20
High performance pseudo dynamic pulse controllable multiplexer Grant 7,592,851 - Chan , et al. September 22, 2	2009-09-22
High Performance Pseudo Dynamic Pulse Controllable Multiplexer App 20090189675 - Chan; Yuen H. ; et al.	2009-07-30
High Performance Pseudo Dynamic 36 Bit Compare App 20090063774 - Chan; Yuen H. ; et al.	2009-03-05
Eight Transistor SRAM Cell with Improved Stability Requiring Only One Word Line App 20090034345 - Chan; Yuen H. ; et al.	2009-02-05
Ring oscillator row circuit for evaluating memory cell performance Grant 7,483,322 - Joshi , et al. January 27, 2	2009-01-27
Merged MISR and output register without performance impact for circuits under test Grant 7,478,297 - Chan , et al. January 13, 2	2009-01-13
Global bit select circuit interface with dual read and write bit line pairs Grant 7,463,537 - Chan , et al. December 9, 2	2008-12-09
Difference signal path test and characterization circuit Grant 7,447,964 - Chan , et al. November 4, 2	2008-11-04
Difference Signal Path Test And Characterization Circuit App 20080270864 - Chan; Yuen H. ; et al.	2008-10-30
Integrated Circuit Chip With Improved Array Stability App 20080231323 - CHAN; YUEN H. ; et al.	2008-09-25
Integrated Circuit Chip With Improved Array Stability App 20080232149 - CHAN; YUEN H. ; et al.	2008-09-25
Programmable Voltage Divider App 20080203980 - Chan; Yuen H. ; et al.	2008-08-28
Integrated circuit chip with improved array stability Grant 7,403,412 - Chan , et al. July 22, 2	2008-07-22
Programmable Local Clock Buffer Capable Of Varying Initial Settings App 20080141061 - Chan; Yuen H. ; et al.	2008-06-12
Row circuit ring oscillator method for evaluating memory cell performance Grant 7,376,001 - Joshi , et al. May 20, 2	2008-05-20
Ring Oscillator Row Circuit For Evaluating Memory Cell Performance App 20080094878 - Joshi; Rajiv V. ; et al.	2008-04-24
Global Bit Select Circuit Interface with Dual Read and Write Bit Line Pairs App 20080056052 - Chan; Yuen H. ; et al.	2008-03-06
Merged MISR and Output Register Without Performance Impact for Circuits Under Test App 20080059854 - Chan; Yuen H. ; et al.	2008-03-06
Global bit select circuit with dual read and write bit line pairs Grant 7,336,546 - Chan , et al. February 26, 2	2008-02-26
Integrated Circuit Chip With Improved Array Stability App 20080019200 - CHAN; YUEN H. ; et al.	2008-01-24
Merged MISR and output register without performance impact for circuits under test Grant 7,305,602 - Chan , et al. December 4, 2	2007-12-04
Eight transistor SRAM cell with improved stability requiring only one word line Grant 7,295,458 - Chan , et al. November 13, 2	2007-11-13
Integrated circuit chip with improved array stability Grant 7,295,457 - Chan , et al. November 13, 2	2007-11-13
Split L2 latch with glitch free programmable delay Grant 7,293,209 - Chan , et al. November 6, 2	2007-11-06
Global bit line restore timing scheme and circuit Grant 7,272,030 - Chan , et al. September 18, 2	2007-09-18
Eight transistor SRAM cell with improved stability requiring only one word line App 20070165445 - Chan; Yuen H. ; et al.	2007-07-19
Ring oscillator row circuit for evaluating memory cell performance App 20070086232 - Joshi; Rajiv V. ; et al.	2007-04-19
Global Bit Line Restore Timing Scheme and Circuit App 20070058421 - Chan; Yuen H. ; et al.	2007-03-15
SRAM array with improved cell stability Grant 7,173,875 - Chan , et al. February 6, 2	2007-02-06
Global bit line restore timing scheme and circuit Grant 7,170,774 - Chan , et al. January 30, 2	2007-01-30
SRAM and dual single ended bit sense for an SRAM Grant 7,170,799 - Chan , et al. January 30, 2	2007-01-30
SRAM ring oscillator Grant 7,142,064 - Chan , et al. November 28, 2	2006-11-28
Local bit select with suppression of fast read before write Grant 7,113,433 - Chan , et al. September 26, 2	2006-09-26
Merged MISR and output register without performance impact for circuits under test App 20060195738 - Chan; Yuen H. ; et al.	2006-08-31
SRAM and dual single ended bit sense for an SRAM App 20060176732 - Chan; Yuen H. ; et al.	2006-08-10
High performance CMOS NOR predecode circuit App 20060176757 - Chan; Yuen H. ; et al.	2006-08-10
Cycle staging latch with dual phase dynamic outputs for hit logic compare App 20060176095 - Chan; Yuen H. ; et al.	2006-08-10
Local bit select with suppression of fast read before write App 20060176729 - Chan; Yuen H. ; et al.	2006-08-10
Global bit line restore timing scheme and circuit App 20060176730 - Chan; Yuen H. ; et al.	2006-08-10
Split L2 latch with glitch free programmable delay App 20060179375 - Chan; Yuen H. ; et al.	2006-08-10
Global bit select circuit with dual read and write bit line pairs App 20060176753 - Chan; Yuen H. ; et al.	2006-08-10
Output driver with pulse to static converter Grant 7,084,673 - Chan , et al. August 1, 2	2006-08-01
Difference signal path test and characterization circuit App 20060146621 - Chan; Yuen H. ; et al.	2006-07-06
Cache late select circuit Grant 7,054,184 - Chan , et al. May 30, 2	2006-05-30
Sram ring oscillator App 20060097802 - Chan; Yuen H. ; et al.	2006-05-11
Clock driver and boundary latch for a multi-port SRAM Grant 6,990,038 - Chan , et al. January 24, 2	2006-01-24
Output driver with pulse to static converter App 20050253639 - Chan, Yuen H. ; et al.	2005-11-17
Programmable Sense Amplifier Timing Generator App 20050254317 - Chan, Yuen H. ; et al.	2005-11-17
Cache late select circuit App 20050254285 - Chan, Yuen H. ; et al.	2005-11-17
Programmable sense amplifier timing generator Grant 6,958,943 - Chan , et al. October 25, 2	2005-10-25
Method to improve cache capacity of SOI and bulk Grant 6,934,182 - Chan , et al. August 23, 2	2005-08-23
SRAM array with improved cell stability App 20050078508 - Chan, Yuen H. ; et al.	2005-04-14
Method to improve cache capacity of SOI and bulk App 20050073874 - Chan, Yuen H. ; et al.	2005-04-07
Integrated circuit chip with improved array stability App 20050063232 - Chan, Yuen H. ; et al.	2005-03-24
Coupled body contacts for SOI differential circuits Grant 6,868,000 - Chan , et al. March 15, 2	2005-03-15
High performance programmable array local clock generator Grant 6,850,460 - Chan , et al. February 1, 2	2005-02-01
Coupled body contacts for SOI differential circuits App 20040228160 - Chan, Yuen H. ; et al.	2004-11-18
High performance dual-stage sense amplifier circuit Grant 6,788,112 - Chan , et al. September 7, 2	2004-09-07
CMOS sense amplifier Grant 5,627,484 - Tuminaro , et al. May 6, 1	1997-05-06
Precharged bit decoder and sense amplifier with integrated latch usable in pipelined memories Grant 5,481,500 - Reohr , et al. January 2, 1	1996-01-02
Asymmetrical clock chopper delay circuit Grant 4,851,711 - Chan , et al. July 25, 1	1989-07-25
Random access memory RAM employing complementary transistor switch (CTS) memory cells Grant 4,598,390 - Chan July 1, 1	1986-07-01
Means for enhancing logic circuit performance Grant 4,529,894 - Chan , et al. July 16, 1	1985-07-16