loadpatents
name:-0.082998037338257
name:-0.074807167053223
name:-0.0043959617614746
Chan; Vei-Han Patent Filings

Chan; Vei-Han

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chan; Vei-Han.The latest application filed is for "micro lens sensor having micro lens heights that vary based on image height".

Company Profile
1.44.31
  • Chan; Vei-Han - San Jose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Time-of-flight RGB-IR image sensor
Grant 11,435,476 - Xu , et al. September 6, 2
2022-09-06
Micro Lens Sensor Having Micro Lens Heights that Vary Based on Image Height
App 20210356628 - Xu; Zhanping ;   et al.
2021-11-18
Micro lens time-of-flight sensor having micro lens heights that vary based on image height
Grant 11,079,515 - Xu , et al. August 3, 2
2021-08-03
Micro Lens Time-of-flight Sensor Having Micro Lens Heights That Vary Based On Image Height
App 20210190996 - XU; Zhanping ;   et al.
2021-06-24
Time-of-flight Rgb-ir Image Sensor
App 20200116862 - XU; Zhanping ;   et al.
2020-04-16
CMOS image sensor with a reduced likelihood of an induced electric field in the epitaxial layer
Grant 9,923,003 - Elkhatib , et al. March 20, 2
2018-03-20
CMOS Image Sensor With A Reduced Likelihood Of An Induced Electric Field In The Epitaxial Layer
App 20170005124 - Elkhatib; Tamer ;   et al.
2017-01-05
Multi-terminal phase change devices
Grant 8,822,967 - Kordus, II , et al. September 2, 2
2014-09-02
Field-programmable gate array having voltage identification capability
Grant 8,639,952 - Chan , et al. January 28, 2
2014-01-28
Multi-terminal phase change devices
Grant 8,486,745 - Kordus, II , et al. July 16, 2
2013-07-16
Multi-Terminal Phase Change Devices
App 20120182794 - Kordus, II; Louis Charles ;   et al.
2012-07-19
Impedance matching and trimming apparatuses and methods using programmable resistance devices
Grant 8,222,917 - Oliva , et al. July 17, 2
2012-07-17
Multi-terminal phase change devices
Grant 8,183,551 - Kordus, II , et al. May 22, 2
2012-05-22
Method for selectively establishing an electrical connection in a multi-terminal phase change device
Grant 8,178,380 - Kordus, II , et al. May 15, 2
2012-05-15
Method of forming ONO-type sidewall with reduced bird's beak
Grant 7,910,429 - Dong , et al. March 22, 2
2011-03-22
Reconfigurable logic structures
Grant 7,755,389 - Murphy , et al. July 13, 2
2010-07-13
SEU hardened latches and memory cells using programmable resistance devices
Grant 7,746,682 - Oliva , et al. June 29, 2
2010-06-29
Multi-terminal phase change devices
App 20100091560 - Kordus, II; Louis Charles ;   et al.
2010-04-15
Methods for fabricating multi-terminal phase change devices
Grant 7,696,018 - Oliva , et al. April 13, 2
2010-04-13
Reconfigurable Logic Structures
App 20090134910 - Murphy; Colin Neal ;   et al.
2009-05-28
Reconfigurable logic structures
Grant 7,511,532 - Derharcobian , et al. March 31, 2
2009-03-31
Methods for fabricating multi-terminal phase change devices
Grant 7,494,849 - Oliva , et al. February 24, 2
2009-02-24
Methods for Fabricating Multi-Terminal Phase Change Devices
App 20080206922 - Oliva; Antonietta ;   et al.
2008-08-28
Method and apparatus for programming phase change devices
App 20080025080 - Chan; Vei-Han ;   et al.
2008-01-31
Multi-terminal phase change devices
App 20070235707 - Kordus; Louis Charles II ;   et al.
2007-10-11
Impedance matching and trimming apparatuses and methods using programmable resistance devices
App 20070188187 - Oliva; Antonietta ;   et al.
2007-08-16
SEU hardened latches and memory cells using progrmmable resistance devices
App 20070165446 - Oliva; Antonietta ;   et al.
2007-07-19
Reconfigurable logic structures
App 20070146012 - Murphy; Colin Neal ;   et al.
2007-06-28
Multi-terminal phase change devices
App 20070096071 - Kordus; Louis Charles II ;   et al.
2007-05-03
Methods for fabricating multi-terminal phase change devices
App 20070099405 - Oliva; Antonietta ;   et al.
2007-05-03
Atomic layer deposition of interpoly oxides in a non-volatile memory device
Grant 7,122,415 - Jang , et al. October 17, 2
2006-10-17
Nonvolatile memory cell with a floating gate at least partially located in a trench in a semiconductor substrate
Grant 7,057,231 - Ding , et al. June 6, 2
2006-06-06
Nonvolatile memory cell with a floating gate at least partially located in a trench in a semiconductor substrate
Grant 7,005,338 - Ding , et al. February 28, 2
2006-02-28
Methods for forming nitrogen-rich regions in non-volatile semiconductor memory devices
Grant 6,989,319 - Ramsbey , et al. January 24, 2
2006-01-24
Atomic layer deposition of interpoly oxides in a non-volatile memory device
App 20060008997 - Jang; Chuck ;   et al.
2006-01-12
Nonvolatile memory structures and fabrication methods
Grant 6,962,848 - Leung , et al. November 8, 2
2005-11-08
Method of forming ONO-type sidewall with reduced bird's beak
App 20050227437 - Dong, Zhong ;   et al.
2005-10-13
Array architecture and process flow of nonvolatile memory devices for mass storage applications
Grant 6,891,221 - Lee , et al. May 10, 2
2005-05-10
Nonvolatile memory structures and fabrication methods
Grant 6,821,847 - Leung , et al. November 23, 2
2004-11-23
Nonvolatile memory structures and fabrication methods
Grant 6,815,760 - Leung , et al. November 9, 2
2004-11-09
Nonvolatile memory cell with a floating gate at least partially located in a trench in a semiconductor substrate
App 20040207006 - Ding, Yi ;   et al.
2004-10-21
Nonvolatile Memory With Pedestals
App 20040191986 - Chung, Mei-Hua ;   et al.
2004-09-30
Nonvolatile memory with pedestals
Grant 6,787,415 - Chung , et al. September 7, 2
2004-09-07
Array architecture and process flow of nonvolatile memory devices for mass storage applications
App 20040166634 - Lee, Peter W. ;   et al.
2004-08-26
Array architecture and process flow of nonvolatile memory devices for mass storage applications
App 20040165459 - Lee, Peter W. ;   et al.
2004-08-26
Nonvolatile memory structures and fabrication methods
App 20040087088 - Leung, Chung Wai ;   et al.
2004-05-06
Non-volatile semiconductor memory having split-gate memory cells mirrored in a virtual ground configuration
Grant 6,717,846 - Lee , et al. April 6, 2
2004-04-06
Nonvolatile memory cell with a floating gate at least partially located in a trench in a semiconductor substrate
App 20040056299 - Ding, Yi ;   et al.
2004-03-25
Atomic layer deposition of interpoly oxides in a non-volatile memory device
App 20040051134 - Jang, Chuch ;   et al.
2004-03-18
Stacked gate flash memory cell with reduced distrub conditions
App 20040008561 - Lee, Peter W. ;   et al.
2004-01-15
Nonvolatile memory structures and access methods
Grant 6,674,669 - Tuan , et al. January 6, 2
2004-01-06
Stacked gate flash memory cell with reduced disturb conditions
Grant 6,660,585 - Lee , et al. December 9, 2
2003-12-09
Nonvolatile memories with floating gate spacers, and methods of fabrication
Grant 6,570,215 - Tuan , et al. May 27, 2
2003-05-27
Nonvolatile memories with floating gate spacers, and methods of fabrication
Grant 6,562,681 - Tuan , et al. May 13, 2
2003-05-13
Nonvolatile memory structures and fabrication methods
App 20030067031 - Leung, Chung Wai ;   et al.
2003-04-10
Nonvolatile memory structures and fabrication methods
App 20030068859 - Leung, Chung Wai ;   et al.
2003-04-10
Nonvolatile Memory structures and access methods
App 20030067806 - Tuan, Hsing T. ;   et al.
2003-04-10
Nonvolatile memory structures and access methods
App 20030067808 - Tuan, Hsing T. ;   et al.
2003-04-10
Nonvolatile Memories With Floating Gate Spacers, And Methods Of Fabrication
App 20020190305 - Tuan, Hsing T. ;   et al.
2002-12-19
Nonvolatile memories with floating gate spacers, and methods of fabrication
App 20020190307 - Tuan, Hsing T. ;   et al.
2002-12-19
Multiple byte channel hot electron programming using ramped gate and source bias voltage
Grant 6,275,415 - Haddad , et al. August 14, 2
2001-08-14
Array architecture and process flow of nonvolatile memory devices for mass storage applications
Grant 6,258,668 - Lee , et al. July 10, 2
2001-07-10
Biasing method and structure for reducing band-to-band and/or avalanche currents during the erase of flash memory devices
Grant 6,236,596 - Sobek , et al. May 22, 2
2001-05-22
Flash memory cell & array with improved pre-program and erase characteristics
Grant 6,188,604 - Liu , et al. February 13, 2
2001-02-13
Erase condition for flash memory
Grant 6,134,150 - Hsu , et al. October 17, 2
2000-10-17
Method and system for using a spacer to offset implant damage and reduce lateral diffusion in flash memory devices
Grant 6,025,240 - Chan , et al. February 15, 2
2000-02-15
Methods for forming nitrogen-rich regions in a floating gate and interpoly dielectric layer in a non-volatile semiconductor memory device
Grant 6,001,713 - Ramsbey , et al. December 14, 1
1999-12-14
Methods and arrangements for introducing nitrogen into a tunnel oxide in a non-volatile semiconductor memory device
Grant 5,972,751 - Ramsbey , et al. October 26, 1
1999-10-26
Method and system for source only reoxidation after junction implant for flash memory devices
Grant 5,940,709 - Chan August 17, 1
1999-08-17
Non-uniform threshold voltage adjustment in flash eproms through gate work function alteration
Grant 5,888,867 - Wang , et al. March 30, 1
1999-03-30
Method for programming flash electrically erasable programmable read-only memory
Grant 5,875,130 - Haddad , et al. February 23, 1
1999-02-23
Memory cell programming with controlled current injection
Grant 5,856,946 - Chan , et al. January 5, 1
1999-01-05

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed